From: Catalin Marinas <catalin.marinas@arm.com>
To: Yicong Yang <yangyicong@huawei.com>
Cc: yangyicong@hisilicon.com, will@kernel.org, maz@kernel.org,
mark.rutland@arm.com, broonie@kernel.org,
linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev,
ryan.roberts@arm.com, linuxarm@huawei.com,
jonathan.cameron@huawei.com,
shameerali.kolothum.thodi@huawei.com, prime.zeng@hisilicon.com,
xuwei5@huawei.com, wangkefeng.wang@huawei.com
Subject: Re: [PATCH v4 3/5] arm64: Add support for FEAT_HAFT
Date: Tue, 5 Nov 2024 10:54:29 +0000 [thread overview]
Message-ID: <Zyn5ZQ3K6FRSjVLO@arm.com> (raw)
In-Reply-To: <965cde16-c1f6-dcdb-7471-6cf95e7f51f8@huawei.com>
On Tue, Nov 05, 2024 at 06:38:51PM +0800, Yicong Yang wrote:
> On 2024/11/5 10:47, Yicong Yang wrote:
> > On 2024/11/5 1:28, Catalin Marinas wrote:
> >> On Sat, Nov 02, 2024 at 06:42:33PM +0800, Yicong Yang wrote:
> >>> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> >>> index 3d261cc123c1..ed8c784ca082 100644
> >>> --- a/arch/arm64/include/asm/cpufeature.h
> >>> +++ b/arch/arm64/include/asm/cpufeature.h
> >>> @@ -838,6 +838,12 @@ static inline bool system_supports_poe(void)
> >>> alternative_has_cap_unlikely(ARM64_HAS_S1POE);
> >>> }
> >>>
> >>> +static inline bool system_supports_haft(void)
> >>> +{
> >>> + return IS_ENABLED(CONFIG_ARM64_HAFT) &&
> >>> + cpus_have_final_cap(ARM64_HAFT);
> >>> +}
> >>
> >> I'm fine with this approach. If we ever get hardware with mismatched
> >> FEAT_HAFT and some secondary CPUs don't come up, we can revisit.
> >>
> >>> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
> >>> index ccbae4525891..0bc88df7cb35 100644
> >>> --- a/arch/arm64/mm/proc.S
> >>> +++ b/arch/arm64/mm/proc.S
> >>> @@ -498,6 +498,10 @@ alternative_else_nop_endif
> >>> and x9, x9, ID_AA64MMFR1_EL1_HAFDBS_MASK
> >>> cbz x9, 1f
> >>> orr tcr, tcr, #TCR_HA // hardware Access flag update
> >>> +
> >>> +#ifdef CONFIG_ARM64_HAFT
> >>> + orr tcr2, tcr2, TCR2_EL1x_HAFT
> >>> +#endif /* CONFIG_ARM64_HAFT */
> >>> 1:
> >>> #endif /* CONFIG_ARM64_HW_AFDBM */
> >>> msr mair_el1, mair
> >>
> >> If you still want #ifdefs, I'd have left it outside the HW_AFDBM. We
> >> already have a dependency in the Kconfig. Anyway, I can fix this up.
> >
> > yes it has already depend on the HW_AFDBM. And one asm won't cause much to the
> > Image size if user want CONFIG_ARM64_HAFT=n. I'll drop the #ifdef here.
> >
>
> I rethink it and maybe we still need the #ifdef here considering one case: the hardware
> supports FEAT_HAFT while user make CONFIG_ARM64_HAFT=n, in such case the HAFT will be
> enabled unexpectedly if no CONFIG_ARM64_HAFT protection here.
Yes, still keeping the #ifdef but outside of HW_AFDBM. I can fix it up
myself when applying the patches.
--
Catalin
next prev parent reply other threads:[~2024-11-05 10:58 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-02 10:42 [PATCH v4 0/5] Support Armv8.9/v9.4 FEAT_HAFT Yicong Yang
2024-11-02 10:42 ` [PATCH v4 1/5] arm64/sysreg: Update ID_AA64MMFR1_EL1 register Yicong Yang
2024-11-02 10:42 ` [PATCH v4 2/5] arm64: setup: name 'tcr2' register Yicong Yang
2024-11-02 10:42 ` [PATCH v4 3/5] arm64: Add support for FEAT_HAFT Yicong Yang
2024-11-04 17:28 ` Catalin Marinas
2024-11-05 2:47 ` Yicong Yang
2024-11-05 10:38 ` Yicong Yang
2024-11-05 10:54 ` Catalin Marinas [this message]
2024-11-05 8:35 ` Marc Zyngier
2024-11-05 9:58 ` Catalin Marinas
2024-11-05 11:52 ` Marc Zyngier
2024-11-02 10:42 ` [PATCH v4 4/5] arm64: Enable ARCH_HAS_NONLEAF_PMD_YOUNG Yicong Yang
2024-11-04 17:29 ` Catalin Marinas
2024-11-02 10:42 ` [PATCH v4 5/5] arm64: pgtable: Warn unexpected pmdp_test_and_clear_young() Yicong Yang
2024-11-04 17:29 ` Catalin Marinas
2024-11-05 13:51 ` [PATCH v4 0/5] Support Armv8.9/v9.4 FEAT_HAFT Catalin Marinas
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