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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="SEGJF8oLAoHyV+28" Content-Disposition: inline In-Reply-To: <20241107152705.GA1614612@bhelgaas> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241107_080858_848235_17C8B21B X-CRM114-Status: GOOD ( 27.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --SEGJF8oLAoHyV+28 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > On Thu, Nov 07, 2024 at 02:50:55PM +0100, Lorenzo Bianconi wrote: > > In order to make the code more readable, move phy and mac reset lines > > assert/de-assert configuration in .power_up callback > > (mtk_pcie_en7581_power_up/mtk_pcie_power_up). > >=20 > > Signed-off-by: Lorenzo Bianconi > > --- > > drivers/pci/controller/pcie-mediatek-gen3.c | 24 ++++++++++++++++-----= --- > > 1 file changed, 16 insertions(+), 8 deletions(-) > >=20 > > diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/= controller/pcie-mediatek-gen3.c > > index 8c8c733a145634cdbfefd339f4a692f25a6e24de..c0127d0fb4f059b9f9e8163= 60130e183e8f0e990 100644 > > --- a/drivers/pci/controller/pcie-mediatek-gen3.c > > +++ b/drivers/pci/controller/pcie-mediatek-gen3.c > > @@ -867,6 +867,13 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen= 3_pcie *pcie) > > int err; > > u32 val; > > =20 > > + /* > > + * The controller may have been left out of reset by the bootloader > > + * so make sure that we get a clean start by asserting resets here. > > + */ > > + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, > > + pcie->phy_resets); > > + reset_control_assert(pcie->mac_reset); >=20 > Add blank line here. ack, I will fix it. >=20 > > /* > > * Wait for the time needed to complete the bulk assert in > > * mtk_pcie_setup for EN7581 SoC. > > @@ -941,6 +948,15 @@ static int mtk_pcie_power_up(struct mtk_gen3_pcie = *pcie) > > struct device *dev =3D pcie->dev; > > int err; > > =20 > > + /* > > + * The controller may have been left out of reset by the bootloader > > + * so make sure that we get a clean start by asserting resets here. > > + */ > > + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, > > + pcie->phy_resets); > > + reset_control_assert(pcie->mac_reset); > > + usleep_range(10, 20); >=20 > Unrelated to this patch, but since you're moving it, do you know what > this delay is for? Can we add a #define and a spec citation for it? I am not sure about it, this was already there. @Jianjun Wang: any input on it? >=20 > Is there a requirement that the PHY and MAC reset ordering be > different for EN7581 vs other chips? >=20 > EN7581: >=20 > assert PHY reset > assert MAC reset > power on PHY > deassert PHY reset > deassert MAC reset >=20 > others: >=20 > assert PHY reset > assert MAC reset > deassert PHY reset > power on PHY > deassert MAC reset >=20 > Is there one order that would work for both? EN7581 requires to run phy_init()/phy_power_on() before deassert PHY reset lines. Regards, Lorenzo >=20 > > /* PHY power on and enable pipe clock */ > > err =3D reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets,= pcie->phy_resets); > > if (err) { > > @@ -1013,14 +1029,6 @@ static int mtk_pcie_setup(struct mtk_gen3_pcie *= pcie) > > * counter since the bulk is shared. > > */ > > reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->p= hy_resets); > > - /* > > - * The controller may have been left out of reset by the bootloader > > - * so make sure that we get a clean start by asserting resets here. > > - */ > > - reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy= _resets); > > - > > - reset_control_assert(pcie->mac_reset); > > - usleep_range(10, 20); > > =20 > > /* Don't touch the hardware registers before power up */ > > err =3D pcie->soc->power_up(pcie); > >=20 > > --=20 > > 2.47.0 > >=20 --SEGJF8oLAoHyV+28 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCZyzmFgAKCRA6cBh0uS2t rC27AP4tuw1cRLqfjmkC6G4jGSyF1HjTNsNO87nv1lpG3MnOaAEA35d0jQr6E29i cgQIDpKcqDw9XEiX4XP7uSUhAd15GQg= =ioqx -----END PGP SIGNATURE----- --SEGJF8oLAoHyV+28--