From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 311C7CA0EFA for ; Sat, 23 Aug 2025 06:41:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:CC:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=96MWakcLYUDT4lNqC75SMCSgjUsPFgGv1W6nK3rjsuU=; b=ebS8GQA977muoAeIFTynRKLtQm Ib3H98moaRxw0ddkZ9WrptDhQHYJKCsd9CmQGO6Ac5lsVgOZbiw/2Khgw0lk6HgVRTjcnYsXgntGK lUPRmA4XbVk7R01aprmt61U2eedEWKNXDcRsluInq7HAPt8oasLWI5/CMp+/OtVST5tyHWelQaOTd PWxyvBed3kgtttH5WgOYwO/B6XPoyQFSBcDmWJyROOXi97xRXQsqboemYQnCPXbOfLPmihOjAP9eL ccDRns1GBoOgdoOQui23agaKrh7GN+sjwEwF8AtsCTS7vySzjyE9SZloq8EvsbAw6rNDJSXKU5GtB ZAIyZVaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uphw5-00000004Co3-1674; Sat, 23 Aug 2025 06:41:09 +0000 Received: from fllvem-ot03.ext.ti.com ([198.47.19.245]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1upVWl-00000003F2x-2MRx for linux-arm-kernel@lists.infradead.org; Fri, 22 Aug 2025 17:26:13 +0000 Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 57MHQ6fb295383; Fri, 22 Aug 2025 12:26:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1755883566; bh=96MWakcLYUDT4lNqC75SMCSgjUsPFgGv1W6nK3rjsuU=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=YX9L9seIhewXnb2QsC4bjdEtDoAMoXFkyWAnpsBFkN1PyVaWONu/7f8AeBq+eDf5Q J6erPhEHgUV75IAmHNNLKgpq49I0zcvk9Qe/FJld1e6qI8Rd3HPc9+0ipN+hexI445 x3huy9SjjDXX3WwkwciYLeiSBsHHPAT9AfVjHtxM= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 57MHQ6hu3435230 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Fri, 22 Aug 2025 12:26:06 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 22 Aug 2025 12:26:06 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Fri, 22 Aug 2025 12:26:05 -0500 Received: from [10.249.139.51] ([10.249.139.51]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 57MHQ1RA4168190; Fri, 22 Aug 2025 12:26:01 -0500 Message-ID: Date: Fri, 22 Aug 2025 22:56:00 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 33/33] arm64: dts: ti: k3-j7*-ti-ipc-firmware: Switch MCU R5F cluster to Split-mode To: Andrew Davis , , , , , , CC: , , , , , References: <20250814223839.3256046-1-b-padhi@ti.com> <20250814223839.3256046-34-b-padhi@ti.com> <9a3f4271-ada2-48aa-b99d-023619ec5e12@ti.com> Content-Language: en-US From: Beleswar Prasad Padhi In-Reply-To: <9a3f4271-ada2-48aa-b99d-023619ec5e12@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250822_102611_691953_B551A6A6 X-CRM114-Status: GOOD ( 21.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andrew, Nishanth, On 8/15/2025 9:18 PM, Andrew Davis wrote: > On 8/14/25 5:38 PM, Beleswar Padhi wrote: >> Several TI K3 SoCs like J7200, J721E, J721S2, J784S4 and J742S2 have a >> R5F cluster in the MCU domain which is configured for LockStep mode at >> the moment. The necessary support to use MCU R5F cluster in split mode >> was added in the bootloader. And the TI IPC firmware for the split >> processors is already available public. >> >> Therefore, Switch this R5F cluster to Split mode by default in all the >> boards using TI IPC Firmware config (k3-j7*-ti-ipc-firmware). This >> gives out an extra general purpose R5F core free to run any applications >> as required. Lockstep mode remains default in the SoC level dtsi, so >> downstream board dts which do not use TI IPC Firmware config should not >> be impacted by this switch. >> >> Users who prefer to use the fault-tolerant lockstep mode with TI IPC >> firmware config, can do that by setting `ti,cluster-mode` property to 1. > > What a user prefers and other configuration like that does not belong > in devicetree, which should only describe the hardware. > > Configuration should be done using the normal methods, like kernel > cmdline, module params, ioctls, etc.. Maybe we can even set the mode > based on some signal in the firmware itself, like in the resource table. Agreed with your point.. But that is going to take a long time to implement + upstream. I interpreted from [0] that it was okay to enable this split mode once we had refactored the firmware related nodes in an overlay? (Since people can swap out the dtsi if they don't need the firmware config) Nishanth/Andrew, Please advise if this patch is okay or should be dropped in the revision... [0]: https://lore.kernel.org/all/20250523114822.jrv73frz2wbzdd6d@falsify/ Thanks, Beleswar > > Andrew > >> >> Signed-off-by: Beleswar Padhi >> --- >> arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi | 1 + >> arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi | 1 + >> arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi | 1 + >> .../boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi | 1 + >>   4 files changed, 4 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi >> b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi >> index 8eff7bd2e771..ddf3cd899d0e 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi >> @@ -94,6 +94,7 @@ &main_timer2 { >>     &mcu_r5fss0 { >>       status = "okay"; >> +    ti,cluster-mode = <0>; >>   }; >>     &mcu_r5fss0_core0 { >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi >> b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi >> index 5b3fa95aed76..57890a3b38a2 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi >> @@ -211,6 +211,7 @@ &main_timer15 { >>   }; >>     &mcu_r5fss0 { >> +    ti,cluster-mode = <0>; >>       status = "okay"; >>   }; >>   diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi >> b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi >> index 40c9f2b64e7e..7ee8a8615246 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi >> @@ -179,6 +179,7 @@ &main_timer5 { >>   }; >>     &mcu_r5fss0 { >> +    ti,cluster-mode = <0>; >>       status = "okay"; >>   }; >>   diff --git >> a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi >> b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi >> index b5a4496a05bf..e12fa55a4df0 100644 >> --- >> a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi >> +++ >> b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi >> @@ -254,6 +254,7 @@ &main_timer9 { >>   }; >>     &mcu_r5fss0 { >> +    ti,cluster-mode = <0>; >>       status = "okay"; >>   }; >