Re: [PATCH 06/12] arm64: assembler: Remove endianness helper macros

["Ard Biesheuvel" <ardb@kernel.org>]

On Tue, 11 Aug 2026, at 16:01, Will Deacon wrote:
> The CPU_LE()/CPU_BE() helper macros are only used by head.S. Since
> big-endian support depends on BROKEN, remove the last users along with
> the macro definitions. The unused regs_to_64() assembly macro, which
> somewhat bizarrely behaves differently depend on the endianness, is also
> removed.
>
> Signed-off-by: Will Deacon <will@kernel.org>
> ---
>  arch/arm64/include/asm/assembler.h | 31 ------------------------------
>  arch/arm64/kernel/head.S           |  3 +--
>  2 files changed, 1 insertion(+), 33 deletions(-)
>
> diff --git a/arch/arm64/include/asm/assembler.h 
> b/arch/arm64/include/asm/assembler.h
> index effae53e9739..45279e577ff5 100644
> --- a/arch/arm64/include/asm/assembler.h
> +++ b/arch/arm64/include/asm/assembler.h
> @@ -133,37 +133,6 @@ lr	.req	x30		// link register
>  	b	\label
>  	.endm
> 
> -/*
> - * Select code when configured for BE.
> - */
> -#ifdef CONFIG_CPU_BIG_ENDIAN
> -#define CPU_BE(code...) code
> -#else
> -#define CPU_BE(code...)
> -#endif
> -
> -/*
> - * Select code when configured for LE.
> - */
> -#ifdef CONFIG_CPU_BIG_ENDIAN
> -#define CPU_LE(code...)
> -#else
> -#define CPU_LE(code...) code
> -#endif
> -
> -/*
> - * Define a macro that constructs a 64-bit value by concatenating two
> - * 32-bit registers. Note that on big endian systems the order of the
> - * registers is swapped.
> - */
> -#ifndef CONFIG_CPU_BIG_ENDIAN
> -	.macro	regs_to_64, rd, lbits, hbits
> -#else
> -	.macro	regs_to_64, rd, hbits, lbits
> -#endif
> -	orr	\rd, \lbits, \hbits, lsl #32
> -	.endm
> -
>  /*
>   * Pseudo-ops for PC-relative adr/ldr/str <reg>, <symbol> where
>   * <symbol> is within the range +/- 4 GB of the PC.
> diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> index 87a822e5c4ca..8951ce693552 100644
> --- a/arch/arm64/kernel/head.S
> +++ b/arch/arm64/kernel/head.S
> @@ -138,8 +138,7 @@ SYM_CODE_START_LOCAL(record_mmu_state)
>  	b.ne	0f
>  	mrs	x19, sctlr_el2
>  0:
> -CPU_LE( tbnz	x19, #SCTLR_ELx_EE_SHIFT, 1f	)
> -CPU_BE( tbz	x19, #SCTLR_ELx_EE_SHIFT, 1f	)
> +	tbnz	x19, #SCTLR_ELx_EE_SHIFT, 1f
>  	tst	x19, #SCTLR_ELx_C		// Z := (C == 0)
>  	and	x19, x19, #SCTLR_ELx_M		// isolate M bit
>  	csel	x19, xzr, x19, eq		// clear x19 if Z

There is some more code that can be removed here - see
2ced0f30a426c7301350681f838344d5aea711e3