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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 25/10/24 18:52, Andrew Lunn wrote: > On Fri, Oct 25, 2024 at 11:17:44AM +0530, Meghana Malladi wrote: >> >> >> On 25/10/24 01:25, Andrew Lunn wrote: >>>> +static inline u64 icssg_readq(const void __iomem *addr) >>>> +{ >>>> + return readl(addr) + ((u64)readl(addr + 4) << 32); >>>> +} >>>> + >>>> +static inline void icssg_writeq(u64 val, void __iomem *addr) >>>> +{ >>>> + writel(lower_32_bits(val), addr); >>>> + writel(upper_32_bits(val), addr + 4); >>>> +} >>> >>> Could readq() and writeq() be used, rather than your own helpers? >>> >>> Andrew >>> >> The addresses we are trying to read here are not 64-bit aligned, hence using >> our own helpers to read the 64-bit value. > > Ah, you should document this, because somebody might do a drive by > patch converting this to readq()/write(q). > > Alternatively, i think hi_lo_writeq() would work. > > Andrew I tried hi_lo_readq() and hi_lo_writeq(), and it is fitting my requirement. Thanks, I will update it. Regards, Meghana