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Mon, 08 Jun 2026 07:43:42 -0700 (PDT) X-Received: by 2002:a17:90b:180a:b0:36a:7da3:266b with SMTP id 98e67ed59e1d1-370f0c54d08mr16715093a91.21.1780929822496; Mon, 08 Jun 2026 07:43:42 -0700 (PDT) Received: from [10.219.56.113] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36f6bf827f1sm19620137a91.3.2026.06.08.07.43.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Jun 2026 07:43:42 -0700 (PDT) Message-ID: Date: Mon, 8 Jun 2026 20:13:36 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/6] iommu/arm-smmu: Add interconnect bandwidth voting support To: Dmitry Baryshkov Cc: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20260526-smmu_interconnect_addition-v2-0-2a6d8ca30d63@oss.qualcomm.com> <20260526-smmu_interconnect_addition-v2-2-2a6d8ca30d63@oss.qualcomm.com> <68aa9591-49e0-4cb7-9a5b-36405efe7094@oss.qualcomm.com> Content-Language: en-US From: Bibek Kumar Patro In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA4MDE0MCBTYWx0ZWRfXxcJ45smrmbh8 xY61xOnAQltmVVK8brU8rZsWst/DA0VEbmfSA9fs4xvXc/2s3I3fj+KdArAU2dRYaA9faVIrb0w G8P++VcQmeCTemw9pUGHpFQ6dREzfHNpyZxzL1tVJvXolTBMf+z/1GkKEt2p1nUr7kUgVB5Ilr9 MNnC7ZCDsvhdA1wPlFKnPpf6L+YjJRz/kIJWqZaWn1GAw/A1UAWMzsCgOllOl+d8wn98cZb0UAZ n9XkGK1fSVpTBisl7Xhrt3ukrtvfRg6si8y9Dx15zPZlGwItAlJbS6MUg09brqJ+YoYPnI0Je6y 3nFpD/DJytIfirEvl0Hk8TVaAwbTzDsK9+3ubyWCF3QJ62pbgZBAH46857dPd326Up+l9XyLltx 8nX2ntMT7pisA+nqi9crKoQouqvTxlmvqPTdibHGEy8rX69MzjCKYypfgP7XlqIim4LrVJ3XgvJ DxaWL2SpJVxa0NfIxNA== X-Authority-Analysis: v=2.4 cv=RfugzVtv c=1 sm=1 tr=0 ts=6a26d51f cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=NEAV23lmAAAA:8 a=ow02GMYoO05H5sz-MT4A:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-ORIG-GUID: YwEq3MPA2xQMb9sFw27THhfjnvPdv8mR X-Proofpoint-GUID: YwEq3MPA2xQMb9sFw27THhfjnvPdv8mR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-08_04,2026-06-05_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 adultscore=0 spamscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606080140 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260608_154349_881551_CCAF9BEA X-CRM114-Status: GOOD ( 25.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/8/2026 7:20 PM, Dmitry Baryshkov wrote: > On Mon, Jun 08, 2026 at 06:59:34PM +0530, Bibek Kumar Patro wrote: >> >> ... >> >>> --- >>> drivers/iommu/arm/arm-smmu/arm-smmu.c | 57 +++++++++++++++++++++++++++++++++-- >>> drivers/iommu/arm/arm-smmu/arm-smmu.h | 2 ++ >>> 2 files changed, 57 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c >>> index 0bd21d206eb3e75c3b9fb1364cdc92e82c5aa499..07c7e44ec6a5bd1488f00f87d859a20495e46601 100644 >>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c >>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c >>> @@ -53,6 +53,11 @@ >>> #define MSI_IOVA_BASE 0x8000000 >>> #define MSI_IOVA_LENGTH 0x100000 >>> +/* Interconnect bandwidth vote values for the SMMU register access path */ >>> +#define ARM_SMMU_ICC_AVG_BW 0 >>> +#define ARM_SMMU_ICC_PEAK_BW_HIGH 1000 >>> +#define ARM_SMMU_ICC_PEAK_BW_LOW 0 >>> + >>> static int force_stage; >>> module_param(force_stage, int, S_IRUGO); >>> MODULE_PARM_DESC(force_stage, >>> @@ -86,6 +91,36 @@ static inline void arm_smmu_rpm_put(struct arm_smmu_device *smmu) >>> } >>> } >>> +static int arm_smmu_icc_get(struct arm_smmu_device *smmu) >>> +{ >>> + smmu->icc_path = devm_of_icc_get(smmu->dev, NULL); >>> + if (IS_ERR(smmu->icc_path)) { >>> + int err = PTR_ERR(smmu->icc_path); >>> + >>> + if (err == -ENODEV) { >>> + smmu->icc_path = NULL; >>> + return 0; >>> + } >>> + return dev_err_probe(smmu->dev, err, >>> + "failed to get interconnect path\n"); >>> + } >>> + return 0; >>> +} >>> + >>> +static void arm_smmu_icc_enable(struct arm_smmu_device *smmu) >>> +{ >>> + if (smmu->icc_path) >>> + WARN_ON(icc_set_bw(smmu->icc_path, ARM_SMMU_ICC_AVG_BW, >>> + ARM_SMMU_ICC_PEAK_BW_HIGH)); >>> +} >>> + >>> +static void arm_smmu_icc_disable(struct arm_smmu_device *smmu) >>> +{ >>> + if (smmu->icc_path) >>> + WARN_ON(icc_set_bw(smmu->icc_path, ARM_SMMU_ICC_AVG_BW, >>> + ARM_SMMU_ICC_PEAK_BW_LOW)); >>> +} >>> + >>> static void arm_smmu_rpm_use_autosuspend(struct arm_smmu_device *smmu) >>> { >>> /* >>> @@ -2189,6 +2224,17 @@ static int arm_smmu_device_probe(struct platform_device *pdev) >>> if (err) >>> return err; >>> + /* >>> + * Acquire and vote the interconnect path before accessing any SMMU >>> + * registers (including ARM_SMMU_GR0_ID0 in arm_smmu_device_cfg_probe). >>> + */ >>> + err = arm_smmu_icc_get(smmu); >>> + if (err) { >>> + clk_bulk_disable_unprepare(smmu->num_clks, smmu->clks); >>> + return err; >>> + } >>> + arm_smmu_icc_enable(smmu); >>> + >>> err = arm_smmu_device_cfg_probe(smmu); >>> if (err) >>> return err; >>> @@ -2273,8 +2319,10 @@ static void arm_smmu_device_shutdown(struct platform_device *pdev) >>> if (pm_runtime_enabled(smmu->dev)) >>> pm_runtime_force_suspend(smmu->dev); >>> - else >>> + else { >>> clk_bulk_disable(smmu->num_clks, smmu->clks); >>> + arm_smmu_icc_disable(smmu); >>> + } >>> clk_bulk_unprepare(smmu->num_clks, smmu->clks); >>> } >>> @@ -2294,9 +2342,13 @@ static int __maybe_unused arm_smmu_runtime_resume(struct device *dev) >>> struct arm_smmu_device *smmu = dev_get_drvdata(dev); >>> int ret; >>> + arm_smmu_icc_enable(smmu); >>> + >>> ret = clk_bulk_enable(smmu->num_clks, smmu->clks); >>> - if (ret) >>> + if (ret) { >>> + arm_smmu_icc_disable(smmu); >>> return ret; >>> + } >>> arm_smmu_device_reset(smmu); >>> @@ -2308,6 +2360,7 @@ static int __maybe_unused arm_smmu_runtime_suspend(struct device *dev) >>> struct arm_smmu_device *smmu = dev_get_drvdata(dev); >>> clk_bulk_disable(smmu->num_clks, smmu->clks); >>> + arm_smmu_icc_disable(smmu); >>> return 0; >>> } >>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h >>> index 26d2e33cd328b8278888585fc07a31485d9397e2..c00606a416b2f4bb44a35e5d67f6ef801df68e1c 100644 >>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h >>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h >>> @@ -15,6 +15,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> #include >>> #include >>> @@ -335,6 +336,7 @@ struct arm_smmu_device { >>> int num_clks; >>> unsigned int *irqs; >>> struct clk_bulk_data *clks; >>> + struct icc_path *icc_path; >>> spinlock_t global_sync_lock; >>> >> >> Any feedback or concerns on the interconnect voting approach proposed here? >> >> This helps to address the kernel panic issue [1] reported for one of >> Qualcomm platforms. > > Please respond or tend the issues, pointed out by Sashiko. > Sure, I have addressed and replied to the Sashiko warnings on v1, I'll check on the fresh warnings on V2 along with your suggestions on this patch. < I was wondering if it's needed to respond to Sashiko comments earlier or silently address the relevant ones, so thanks for confirming this as well :) > Thanks, Bibek >> >> [1]: https://github.com/qualcomm-linux/kernel/issues/297 >> >> Thanks, >> Bibek >