From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4825C54798 for ; Thu, 29 Feb 2024 20:21:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:Cc:To:From :Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zKqJxNFg95r9AIEbAtLIbNaDeSqircePoSjL+2mgTvE=; b=BSHcRUCIO2Z8adqsNMiqWWVr3X oN7nDJhvPAxzY/AYtQiT7ICJa+DtpkkqiHuvoEvFfkxB9syhTo6SZg0Vu89OoJB8bZlmG+1CR2P4S S2ZOAQQjXVS+QNtUFOYWRM/gxrm9XjaykJKDcOhRZ1xRC6wqcTUqzr85NX+8ZjrL45NiGYbiM33/1 6HXkeHT/w0U6bZG0v4AG4yh3tfrP5vfJsBnebZPHsq1/2ITGK3urVisvjMIsPnz4cf7okrz8+h/X2 lTgewcnK34IF4jT4U9Kh0a6cEF7xT539aj1tOXsnTOzUke2Ja2r0ULptVYb7sbiK7UifQQ8M3GWSJ jDwExBCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rfmuF-0000000F35Y-18Yk; Thu, 29 Feb 2024 20:21:27 +0000 Received: from mail.manjaro.org ([2a01:4f8:c0c:51f3::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rfmuB-0000000F34O-3zoj; Thu, 29 Feb 2024 20:21:25 +0000 MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=manjaro.org; s=2021; t=1709238079; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lOoVMoAXB3VZ489hYgxOdkLWZ9rTABRB51In2ZkNqYI=; b=QwTBXXpR4t3xKdeNS3I1I0E5JeFrRVHhhUEy90UooX7q5QilqPpWr7+jJae9QFd+b6nY++ nng9MSThBIhQ9Ta8mYVVmTC3dhm0fA59M+SSv2lXGCFM0NyTA1/15IAM648lg4un3rBdzt YME7FUvGQSijypNBPy10ss9Ih2cCIXRqf7v7lluT/nVBKc1EaY+b4TkV3EH8fbEJfTlEK+ jxqAo2qkuHBKNXEdtROL952KgK0MsQ+u0MLsuREzeNvBPVtmmoxg/xIRz3k3mjhNMgdWUh YzXw22YV0dziqKyg1O0DLNhOvjLGhebI9dzkxXEgRiNrfdr9eigzjNlRGo4Qhw== Date: Thu, 29 Feb 2024 21:21:18 +0100 From: Dragan Simic To: Alexey Charkov Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Daniel Lezcano , Viresh Kumar , Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/5] arm64: dts: rockchip: enable built-in thermal monitoring on RK3588 In-Reply-To: <20240229-rk-dts-additions-v3-1-6afe8473a631@gmail.com> References: <20240229-rk-dts-additions-v3-0-6afe8473a631@gmail.com> <20240229-rk-dts-additions-v3-1-6afe8473a631@gmail.com> Message-ID: X-Sender: dsimic@manjaro.org Authentication-Results: ORIGINATING; auth=pass smtp.auth=dsimic@manjaro.org smtp.mailfrom=dsimic@manjaro.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240229_122124_339231_DAA5653B X-CRM114-Status: GOOD ( 23.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Alexey, On 2024-02-29 20:26, Alexey Charkov wrote: > Include thermal zones information in device tree for RK3588 variants. > > This also enables the TSADC controller unconditionally on all boards > to ensure that thermal protections are in place via throttling and > emergency reset, once OPPs are added to enable CPU DVFS. > > The default settings (using CRU as the emergency reset mechanism) > should work on all boards regardless of their wiring, as CRU resets > do not depend on any external components. Boards that have the TSHUT > signal wired to the reset line of the PMIC may opt to switch to GPIO > tshut mode instead (rockchip,hw-tshut-mode = <1>;) Quite frankly, I'm still not sure that enabling this on the SoC level is the way to go. As I already described in detail, [4] according to the RK3588 Hardware Design Guide v1.0 and the Rock 5B schematic, we should actually use GPIO-based handling for the thermal runaways on the Rock 5B. Other boards should also be investigated individually, and the TSADC should be enabled on a board-to-board basis. [4] https://lore.kernel.org/linux-rockchip/4e7c2b5a938bd7c919b852699c951701@manjaro.org/ > It seems though that downstream kernels don't use that, even for > those boards where the wiring allows for GPIO based tshut, such as > Radxa Rock 5B [1], [2], [3] > > [1] > https://github.com/radxa/kernel/blob/stable-5.10-rock5/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts#L540 > [2] > https://github.com/radxa/kernel/blob/stable-5.10-rock5/arch/arm64/boot/dts/rockchip/rk3588s.dtsi#L5433 > [3] https://dl.radxa.com/rock5/5b/docs/hw/radxa_rock_5b_v1423_sch.pdf > page 11 (TSADC_SHUT_H) > > Signed-off-by: Alexey Charkov > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 176 > +++++++++++++++++++++++++++++- > 1 file changed, 175 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 36b1b7acfe6a..9bf197358642 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -10,6 +10,7 @@ > #include > #include > #include > +#include > > / { > compatible = "rockchip,rk3588"; > @@ -2225,7 +2226,180 @@ tsadc: tsadc@fec00000 { > pinctrl-1 = <&tsadc_shut>; > pinctrl-names = "gpio", "otpout"; > #thermal-sensor-cells = <1>; > - status = "disabled"; > + status = "okay"; > + }; > + > + thermal_zones: thermal-zones { > + /* sensor near the center of the SoC */ > + package_thermal: package-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 0>; > + > + trips { > + package_crit: package-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + /* sensor between A76 cores 0 and 1 */ > + bigcore0_thermal: bigcore0-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 1>; > + > + trips { > + /* threshold to start collecting temperature > + * statistics e.g. with the IPA governor > + */ > + bigcore0_alert0: bigcore0-alert0 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + /* actual control temperature */ > + bigcore0_alert1: bigcore0-alert1 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + bigcore0_crit: bigcore0-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&bigcore0_alert1>; > + cooling-device = > + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + /* sensor between A76 cores 2 and 3 */ > + bigcore2_thermal: bigcore2-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 2>; > + > + trips { > + /* threshold to start collecting temperature > + * statistics e.g. with the IPA governor > + */ > + bigcore2_alert0: bigcore2-alert0 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + /* actual control temperature */ > + bigcore2_alert1: bigcore2-alert1 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + bigcore2_crit: bigcore2-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&bigcore2_alert1>; > + cooling-device = > + <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + /* sensor between the four A55 cores */ > + little_core_thermal: littlecore-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 3>; > + > + trips { > + /* threshold to start collecting temperature > + * statistics e.g. with the IPA governor > + */ > + littlecore_alert0: littlecore-alert0 { > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + /* actual control temperature */ > + littlecore_alert1: littlecore-alert1 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + littlecore_crit: littlecore-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&littlecore_alert1>; > + cooling-device = > + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + /* sensor near the PD_CENTER power domain */ > + center_thermal: center-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 4>; > + > + trips { > + center_crit: center-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + gpu_thermal: gpu-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 5>; > + > + trips { > + gpu_crit: gpu-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + npu_thermal: npu-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsadc 6>; > + > + trips { > + npu_crit: npu-crit { > + temperature = <115000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > }; > > saradc: adc@fec10000 { _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel