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Fri, 9 Oct 2026 11:22:51 +0200 Message-ID: Subject: Re: [PATCH 0/3] ARM/arm64: dts: stm32: align watchdog DT support accross STM32MP15 platforms From: Antonio Borneo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , , , , CC: Amelie Delaunay Date: Fri, 9 Oct 2026 11:22:50 +0200 In-Reply-To: <20261007151358.1166329-1-antonio.borneo@foss.st.com> References: <20261007151358.1166329-1-antonio.borneo@foss.st.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.48.4 MIME-Version: 1.0 X-Originating-IP: [10.48.86.45] X-ClientProxiedBy: ENXCAS1NODE2.st.com (10.75.128.138) To STKDAG1NODE2.st.com (10.75.128.133) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MI3PEPF00008480:EE_|VI3PR10MB839436:EE_ X-MS-Office365-Filtering-Correlation-Id: f2a72c5e-694e-46bf-decf-08df25e6ed6e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|23010399003|36860700016|56012099006|11063799006|10067099003|18002099003|22082099003|6133799003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: yfoIkwVyylAOlpTPGmUxGXd3iAV08f9e/SLf59wrn0hExzZxiPsrggFSDftnXcqyQBSgPjIdI2nf/Rku/E628cyZ0NWLtB5uKDx9MxlMBYt4g51p7luiS3w8EfvMYkEdlbMT+wFSfIMrMUv8vk88bG3dtVQHvkYYUWFaiyqG6Xe/W2lazH/8cTEPvBbLP+CnFBXUVT+UzMD6qWqpO533T91niW53iHJscDf2b6bZWtyLrXKaqpAPmiP/Hry2jGv2TUx+AGxOOKV1ydh1KE4iNlAROA4QBVbXtZ6Z8epY6StmcdjdxU4eKnoM2lKCAS2SF0B+/ueMbFnpDanvtdHIPB/Mws0YUGXqU42Cn0SGj2WneW2SiTAl2hOjvDSEF1r5zp1n5uMykfX1b+Fu4upkhd3tD2+ZJOPKlYLdMPrSzflpVDG9rueiXtfCYjpWLZzI X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2026 09:23:06.5289 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f2a72c5e-694e-46bf-decf-08df25e6ed6e X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.60];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: MI3PEPF00008480.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI3PR10MB839436 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261009_022315_274400_A3551045 X-CRM114-Status: GOOD ( 11.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 2026-10-07 at 17:13 +0200, Antonio Borneo wrote: > This series updates STM32MP watchdog DT descriptions to keep them aligned > with the actual secure/non-secure watchdog integration used on each > platform family. >=20 > Two watchdog access models are used: > - On ST STM32MP15 non-SCMI boards, IWDG1 is exposed as a non-secure > =C2=A0 watchdog. In that case Linux must register the watchdog device and= keep > =C2=A0 it pinged once it has been started by the boot chain. > - On ST SCMI-based STM32MP15 boards, the watchdog is handled through > =C2=A0 secure world services and exposed to Linux through the ARM SMC wat= chdog > =C2=A0 interface. >=20 >=20 > Amelie Delaunay (2): > =C2=A0 ARM: dts: stm32: enable iwdg1 on STM32MP15 ST boards > =C2=A0 ARM: dts: stm32: enable ARM SMC watchdog on STM32MP15 SCMI boards >=20 > Antonio Borneo (1): > =C2=A0 ARM: dts: stm32: move ARM SMC watchdog to STM32MP151 SoC >=20 > =C2=A0arch/arm/boot/dts/st/stm32mp15-scmi.dtsi=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 |=C2=A0 4 ++++ > =C2=A0arch/arm/boot/dts/st/stm32mp151.dtsi=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 15 +++++++++++++++ > =C2=A0arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts=C2=A0 |=C2=A0 5 +++++ > =C2=A0arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts=C2=A0 |=C2=A0 5 +++++ > =C2=A0arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts=C2=A0 |=C2=A0 5 +++++ > =C2=A0arch/arm/boot/dts/st/stm32mp157c-ed1.dts=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 |=C2=A0 5 +++++ > =C2=A0arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts=C2=A0 |=C2=A0 5 +++++ > =C2=A0arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi |=C2=A0 7 ------- > =C2=A0arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 |=C2=A0 5 +++++ > =C2=A09 files changed, 49 insertions(+), 7 deletions(-) >=20 >=20 > base-commit: f831584128ac2a36fb4fa62fe106793d08c2dbf1 Please discard this series. I will send a V2 asap. Sorry for the noise! Antonio Borneo