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Tue, 19 May 2026 06:53:37 -0700 (PDT) X-Received: by 2002:a17:90b:3505:b0:368:9da3:c496 with SMTP id 98e67ed59e1d1-36951ca7638mr19545289a91.24.1779198817413; Tue, 19 May 2026 06:53:37 -0700 (PDT) Received: from [10.219.56.98] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-369c4bb4d4dsm3568780a91.1.2026.05.19.06.53.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 May 2026 06:53:37 -0700 (PDT) Message-ID: Date: Tue, 19 May 2026 19:23:09 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: iommu: arm,smmu: Document optional interconnects property To: Krzysztof Kozlowski Cc: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260516-smmu_interconnect_addition-v1-0-f889d933f5c1@oss.qualcomm.com> <20260516-smmu_interconnect_addition-v1-1-f889d933f5c1@oss.qualcomm.com> <20260518-mellow-robust-caterpillar-93fcaa@quoll> Content-Language: en-US From: Bibek Kumar Patro In-Reply-To: <20260518-mellow-robust-caterpillar-93fcaa@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDEzNyBTYWx0ZWRfX3N9mXVdxePiZ gj/BIFQ+G2YftYhz7Sne5h6M64W4lbz6gRKdqWieEtMYJXLV+YJLw7w/Et66dtBdXm3MkVQUL+M v8gOomFPzFapnZhKQXLeM4f44EJHXvTre52OVMiONRm8K5SC5jAXugm75HccnTpRP8OzrJTIfnh 9JHG/90Qjg3FTwlNq5rzstXTXr90Ucg65upclazgL0Zlm8a4hXqXz8j7AbQzRs8oeobtv0fau9l HWmrLEoq+Q9QOuVXJGUbAva1jdhLiAwTNba6gPbovSbk1rY7K3o3UbKfR/QGukBWTKgxTmomGVM vEVQ70zzAoK53sSPQBys0nnnOS0aZuAk0Qrw/J5vn2YeBEPDQYqpVa6IHuswQ7q84e+ea9Z71ou 8q5AgpT10NzsWoHwWG9Ryfk+AqFrOtRhce6TPAlSTq3vkPdqpyKpNgWR4UIMYFk7+n3Lo2O68xl n/zfuRmkCuDPoAQORvA== X-Proofpoint-GUID: 7ClvCHKsxjD00qVP2XuGIRg4b4Os-VNr X-Authority-Analysis: v=2.4 cv=Q6/iJY2a c=1 sm=1 tr=0 ts=6a0c6b62 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=E2rNws97cCCTNOQwQB8A:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: 7ClvCHKsxjD00qVP2XuGIRg4b4Os-VNr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605190137 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260519_065339_695406_EE640FFF X-CRM114-Status: GOOD ( 22.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 5/18/2026 6:03 PM, Krzysztof Kozlowski wrote: > On Sat, May 16, 2026 at 06:04:03PM +0530, Bibek Kumar Patro wrote: >> Some SoC implementations require a bandwidth vote on an interconnect > > Then this should be disallowed for other devices in "allOf:". > As of now, we still are checking which all SoCs do not need this interconnects field. So would we need to add the allOf here for now? >> path before the SMMU register space is accessible. Add the optional >> 'interconnects' property to the binding to allow platform DT nodes >> to describe this path. >> >> The arm-smmu driver uses these properties to vote for bandwidth before >> accessing any SMMU registers and releases the vote on runtime suspend. >> >> Signed-off-by: Bibek Kumar Patro >> --- >> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> index 06fb5c8e7547cb7a92823adc2772b94f747376a6..5cbf944f2d3e178b3723d4dbaa19ee0d33446979 100644 >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >> @@ -243,6 +243,15 @@ properties: >> minItems: 1 >> maxItems: 3 >> >> + interconnects: >> + maxItems: 1 >> + description: >> + Optional interconnect path to the SMMU register space. On some SoCs >> + the SMMU registers are only accessible after a bandwidth vote has been > > Drivers are irrelevant here, drop. Also first sentence is redundant. > Schema says what is and what is not optional. > Sure, got it. I will remove the "driver" quotation and "optional" wording from both binding description and commit text. Thanks & regards, Bibek > Best regards, > Krzysztof >