From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08873C433F5 for ; Fri, 28 Jan 2022 17:02:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=khECNwZFf32mvhwstjUcdkTnBg7W//Q7oNxXG2ODDtQ=; b=bkFOfhOV0Nw/LVjljSf6SeIhyh v/t3RMM5IW/Wxjfd9NKVPxR++rPEwm6uoZ1PW/dDzd90t1uVkXv8OnyxtjjKjnm+WfITCMx8n8+MJ JyyoTDxj9LLNDp+Twa+NIQ6Qq60O0AYL9i6sGXd5NWfoLcOk2xqf/9P9YvysxGpZzRqJ6MSmJZB7x TFFusO7SNOmoIajy2mZbo0LV5D5mTkuMbXQoUNCptF+yhUiyCY6K9l6A1wflS9fhIEjT7DWSGBbN+ OZgsP6iBgoSdjHy8HZVTQ9aEx/5g0WVQosoaZi5PesGNzHDJDbn9D3CJGfTi+ooDoY0pPOs9qsgGb sOVkjKNA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDUcU-0037Tk-8n; Fri, 28 Jan 2022 17:01:06 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDUcM-0037SY-40 for linux-arm-kernel@lists.infradead.org; Fri, 28 Jan 2022 17:01:01 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E8B73113E; Fri, 28 Jan 2022 09:00:56 -0800 (PST) Received: from [192.168.4.21] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 162153F793; Fri, 28 Jan 2022 09:00:55 -0800 (PST) Subject: Re: [PATCH v1 3/4] arm64/mte: Add hwcap for asymmetric mode To: Mark Brown , Catalin Marinas , Will Deacon Cc: Joey Gouly , Branislav Rankov , linux-arm-kernel@lists.infradead.org References: <20220127195712.748150-1-broonie@kernel.org> <20220127195712.748150-4-broonie@kernel.org> From: Vincenzo Frascino Message-ID: Date: Fri, 28 Jan 2022 17:00:59 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20220127195712.748150-4-broonie@kernel.org> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220128_090058_303242_3037F126 X-CRM114-Status: GOOD ( 17.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/27/22 7:57 PM, Mark Brown wrote: > Allow userspace to detect support for asymmetric mode by providing a hwcap > for it, using the official feature name FEAT_MTE3. > > Signed-off-by: Mark Brown Reviewed-by: Vincenzo Frascino > --- > Documentation/arm64/elf_hwcaps.rst | 5 +++++ > arch/arm64/include/asm/hwcap.h | 1 + > arch/arm64/include/uapi/asm/hwcap.h | 1 + > arch/arm64/kernel/cpufeature.c | 1 + > arch/arm64/kernel/cpuinfo.c | 1 + > 5 files changed, 9 insertions(+) > > diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst > index b72ff17d600a..a8f30963e550 100644 > --- a/Documentation/arm64/elf_hwcaps.rst > +++ b/Documentation/arm64/elf_hwcaps.rst > @@ -259,6 +259,11 @@ HWCAP2_RPRES > > Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. > > +HWCAP2_MTE3 > + > + Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described > + by Documentation/arm64/memory-tagging-extension.rst. > + > 4. Unused AT_HWCAP bits > ----------------------- > > diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h > index f68fbb207473..8db5ec0089db 100644 > --- a/arch/arm64/include/asm/hwcap.h > +++ b/arch/arm64/include/asm/hwcap.h > @@ -108,6 +108,7 @@ > #define KERNEL_HWCAP_ECV __khwcap2_feature(ECV) > #define KERNEL_HWCAP_AFP __khwcap2_feature(AFP) > #define KERNEL_HWCAP_RPRES __khwcap2_feature(RPRES) > +#define KERNEL_HWCAP_MTE3 __khwcap2_feature(MTE3) > > /* > * This yields a mask that user programs can use to figure out what > diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h > index f03731847d9d..99cb5d383048 100644 > --- a/arch/arm64/include/uapi/asm/hwcap.h > +++ b/arch/arm64/include/uapi/asm/hwcap.h > @@ -78,5 +78,6 @@ > #define HWCAP2_ECV (1 << 19) > #define HWCAP2_AFP (1 << 20) > #define HWCAP2_RPRES (1 << 21) > +#define HWCAP2_MTE3 (1 << 22) > > #endif /* _UAPI__ASM_HWCAP_H */ > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index a46ab3b1c4d5..57de3f3e0518 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -2485,6 +2485,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { > #endif > #ifdef CONFIG_ARM64_MTE > HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE, CAP_HWCAP, KERNEL_HWCAP_MTE), > + HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE_ASYMM, CAP_HWCAP, KERNEL_HWCAP_MTE3), > #endif /* CONFIG_ARM64_MTE */ > HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV), > HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_AFP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_AFP), > diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c > index 591c18a889a5..330b92ea863a 100644 > --- a/arch/arm64/kernel/cpuinfo.c > +++ b/arch/arm64/kernel/cpuinfo.c > @@ -97,6 +97,7 @@ static const char *const hwcap_str[] = { > [KERNEL_HWCAP_ECV] = "ecv", > [KERNEL_HWCAP_AFP] = "afp", > [KERNEL_HWCAP_RPRES] = "rpres", > + [KERNEL_HWCAP_MTE3] = "mte3", > }; > > #ifdef CONFIG_COMPAT > -- Regards, Vincenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel