From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AE4BC3DA41 for ; Thu, 11 Jul 2024 12:42:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:References:CC:To:From:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=DbIMPxwwKyBIZqZvmGAuRDSEKqddstCD/JRN4kIBQLA=; b=MH+L5wP4TWw5+XQgH7UxVSorvm BDQlVub4jdPi66WxEUTRP48m66r+LjGWE4nLjNb6RU64wxAvKIlo9Oy4THdJdk4HfQAePIHXJmpJr E/q8YqbCznxJgr3Y2UMYYur5EDB0NWim9CkTwba9fqyr2v60K3xYB5IZV0TSqgP77k6tgqsdjeBSA 91ZDrolihgn2hIrzAk5pkb+sBgCSynCfzYW9mu8U+3ai4cHcWuRQnQiWCcEbAi/3x2UBAxSc/Ynh+ MnBod6S7i3fPYVo9KjShKm2cTt4ozuolADa3UMCvpzr4XP2rckDqd4/HqWroAlKtNlid2fn0cQaos 4kpe3Kwg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sRt86-0000000DysK-08mK; Thu, 11 Jul 2024 12:42:34 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sRt7n-0000000Dyob-2zzs for linux-arm-kernel@lists.infradead.org; Thu, 11 Jul 2024 12:42:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1720701735; x=1752237735; h=message-id:date:mime-version:subject:from:to:cc: references:in-reply-to:content-transfer-encoding; bh=rJsgesIVzhdyDoHii5bgpKooeyXaE1kjuc//pkbJjDk=; b=MCqC4Z3I93C7AN1ZqeGYujvc5AnyTYYEhFKQWh4c6LlwZtT5dS2BTXp3 GSX8oMFJZJBSV0TZ8IaFcUJy6Y6coD1HrHYB1E1i680jAjxL6JZRD2ajg pfAPCYqIV4hbm1AnD3oN09sjHTuzvb52ZL0RzNTrOKMGs5n3P0LuNo+YM Gh9QN/KEYii9z0fcea7jB8FrHbVI11zlBjEimvjXRm7QqJtYyxp82/USX 1QHX0t9uncUBbAVG3RdiKyd4MLx1L7z2oXK5Go6wtjA+WBoRANYPTrGXd I+GAcO8AjUBTejLFLGlWLsdNJRitbVeLyES8U/svAUPWPGhpmorxhNrzo Q==; X-CSE-ConnectionGUID: 4PLxtLmWRACg2xbxAfqrYQ== X-CSE-MsgGUID: HxPwORIfQxqRqGF1Ct77BQ== X-IronPort-AV: E=Sophos;i="6.09,200,1716274800"; d="scan'208";a="31789929" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jul 2024 05:42:13 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 11 Jul 2024 05:41:41 -0700 Received: from [10.180.117.34] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 11 Jul 2024 05:41:38 -0700 Message-ID: Date: Thu, 11 Jul 2024 14:42:01 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 15/27] dt-bindings: interrupt-controller: Document the property microchip,nr-irqs Content-Language: en-US, fr-FR From: Nicolas Ferre To: , CC: , , , , , , , , , , References: <20240703102011.193343-1-varshini.rajendran@microchip.com> <20240703102814.196063-1-varshini.rajendran@microchip.com> <20240703-dentist-wired-bdb063522ef7@spud> <82ca4f3d-fa78-4617-823e-69f16a2c3319@microchip.com> Organization: microchip In-Reply-To: <82ca4f3d-fa78-4617-823e-69f16a2c3319@microchip.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240711_054215_915451_E42CD148 X-CRM114-Status: GOOD ( 26.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Answering to myself (again) and to Conor... On 09/07/2024 at 16:06, Nicolas.Ferre@microchip.com wrote: > On 09/07/2024 at 08:13, Varshini Rajendran - I67070 wrote: >> On 03/07/24 9:11 pm, Conor Dooley wrote: >>> On Wed, Jul 03, 2024 at 03:58:14PM +0530, Varshini Rajendran wrote: >>>> Add the description and conditions to the device tree documentation >>>> for the property microchip,nr-irqs. >>>> >>>> Signed-off-by: Varshini Rajendran >>> This needs to be part of patch 14. >>> >>>> --- >>>> .../bindings/interrupt-controller/atmel,aic.yaml | 12 ++++++++++++ >>>> 1 file changed, 12 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml >>>> index 9c5af9dbcb6e..06e5f92e7d53 100644 >>>> --- a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml >>>> +++ b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml >>>> @@ -54,6 +54,10 @@ properties: >>>> $ref: /schemas/types.yaml#/definitions/uint32-array >>>> description: u32 array of external irqs. >>>> >>>> + microchip,nr-irqs: >>>> + $ref: /schemas/types.yaml#/definitions/uint32-array >>>> + description: u32 array of nr_irqs. >>> This makes no sense, did you just copy from above? Why would the number >>> of irqs be an array? Why can't you determine this from the compatble? >>> >> Sorry for the bad description. I will correct it in the next version. >> >> For the second part of the question, this change was done as a step to >> resolve having a new compatible while having practically the same IP >> pointed out in the v3 of the series [1]. It is kind of looping back to >> the initial idea now. Even if this is added as a driver data, it >> overrides the expectation from the comment in [1]. Please suggest. I > > In your v3 patch, indeed you were extracting the number of IRQs from the > compatibility string (aka, from device tree...). It's my preferred > solution as well. > > So, come back to v3 [1] and address what Conor said in v4 "...having > specific $soc_aic5_of_init() functions for each SoC seems silly when > usually only the number of interrupts changes. The number of IRQs could > be in the match data and you could use aic5_of_init in your > IRQCHIP_DECLARE directly" Well, after a brief talk with Varshini and a review of the code, I'm not so sure it's worth re-writing this part anymore Conor... It'll need changing 3-4 files (2 drivers and the "common" .h/.c files, because of the type change of ".data"); handling the special case of sama5d2 (smr_cache thing) and touching lot more code than what is done in v3 of this patch series. Original design was probably not optimal, but well, it's simple, understandable and except if there is a big benefit in moving, I would prefer to keep it like this. If you agree, we can ask Varshini to re-post a separated IRQ-focused series for handling sam9x75 changes. Best regards, Nicolas > I think that we can convince Marc/Thomas that it's the best option as it > prevents introducing another non-standard property to the DT, does not break > the ABI (and was used happily for years). > > Best regards, > Nicolas > > [1] > https://lore.kernel.org/lkml/87ee1e3c365686bc60e92ba3972dc1a5@kernel.org/ > > >> also read Rob's concerns on having a device tree property for number of >> irqs. >> >> [1] >> https://lore.kernel.org/lkml/87ee1e3c365686bc60e92ba3972dc1a5@kernel.org/ >> >>> Thanks, >>> Conor. >>> >>>> + >>>> allOf: >>>> - $ref: /schemas/interrupt-controller.yaml# >>>> - if: >>>> @@ -71,6 +75,14 @@ allOf: >>>> atmel,external-irqs: >>>> minItems: 1 >>>> maxItems: 1 >>>> + - if: >>>> + properties: >>>> + compatible: >>>> + contains: >>>> + const: microchip,sam9x7-aic >>>> + then: >>>> + required: >>>> + - microchip,nr-irqs >>>> >>>> required: >>>> - compatible >>>> -- >>>> 2.25.1 >>>> >> >