From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Jing Zhang <jingzhangos@google.com>,
Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-kernel@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
kernel-team@android.com, David Brazdil <dbrazdil@google.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe()
Date: Thu, 04 Feb 2021 09:30:08 +0000 [thread overview]
Message-ID: <a660fd06d43451b4693fbb65f2ee1b56@kernel.org> (raw)
In-Reply-To: <20210203211319.GA19694@willie-the-truck>
Hi Will,
On 2021-02-03 21:13, Will Deacon wrote:
> Hi Marc,
>
> On Mon, Feb 01, 2021 at 11:56:22AM +0000, Marc Zyngier wrote:
>> There isn't much that a VHE kernel needs on top of whatever has
>> been done for nVHE, so let's move the little we need to the
>> VHE stub (the SPE setup), and drop the init_el2_state macro.
>>
>> No expected functional change.
>>
>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>> Acked-by: David Brazdil <dbrazdil@google.com>
>> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
>> ---
>> arch/arm64/kernel/hyp-stub.S | 28 +++++++++++++++++++++++++---
>> 1 file changed, 25 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/kernel/hyp-stub.S
>> b/arch/arm64/kernel/hyp-stub.S
>> index 373ed2213e1d..6b5c73cf9d52 100644
>> --- a/arch/arm64/kernel/hyp-stub.S
>> +++ b/arch/arm64/kernel/hyp-stub.S
>> @@ -92,9 +92,6 @@ SYM_CODE_START_LOCAL(mutate_to_vhe)
>> msr hcr_el2, x0
>> isb
>>
>> - // Doesn't do much on VHE, but still, worth a shot
>> - init_el2_state vhe
>> -
>> // Use the EL1 allocated stack, per-cpu offset
>> mrs x0, sp_el1
>> mov sp, x0
>> @@ -107,6 +104,31 @@ SYM_CODE_START_LOCAL(mutate_to_vhe)
>> mrs_s x0, SYS_VBAR_EL12
>> msr vbar_el1, x0
>>
>> + // Fixup SPE configuration, if supported...
>> + mrs x1, id_aa64dfr0_el1
>> + ubfx x1, x1, #ID_AA64DFR0_PMSVER_SHIFT, #4
>> + mov x2, xzr
>> + cbz x1, skip_spe
>> +
>> + // ... and not owned by EL3
>> + mrs_s x0, SYS_PMBIDR_EL1
>> + and x0, x0, #(1 << SYS_PMBIDR_EL1_P_SHIFT)
>> + cbnz x0, skip_spe
>> +
>> + // Let the SPE driver in control of the sampling
>> + mrs_s x0, SYS_PMSCR_EL1
>> + bic x0, x0, #(1 << SYS_PMSCR_EL2_PCT_SHIFT)
>> + bic x0, x0, #(1 << SYS_PMSCR_EL2_PA_SHIFT)
>> + msr_s SYS_PMSCR_EL1, x0
>
> Why do we need to touch pmscr_el1 at all? The SPE driver should take
> care of
> that, no? If you drop the pmscr_el1 accesses, I think you can drop the
> pmbidr_el1 check as well.
That's definitely a brain fart, and is what we need on the nVHE path,
not here. Doing the same thing twice isn't exactly helpful.
> And actually, then why even check dfr0? Doing the
> bic for the mdcr_el1.e2pb bits is harmless.
>
>> + mov x2, #MDCR_EL2_TPMS
>> +
>> +skip_spe:
>> + // For VHE, use EL2 translation and disable access from EL1
>> + mrs x0, mdcr_el2
>> + bic x0, x0, #(MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT)
>> + orr x0, x0, x2
>> + msr mdcr_el2, x0
>
> Doesn't this undo the setting of mdcr_el2.hpmn if SPE is not present or
> unavailable? (This wouldn't be an issue if we removed the skip_spe
> paths
> altogether).
I don't think it does. We only clear the E2PB bits (harmless, as you
point
out above), and OR something that is either 0 (no SPE) or MDCR_EL2_TPMS.
In any case, the HPMN bits are preserved (having been set during the
nVHE
setup).
I think the following patch addresses the above issue, which I'll squash
with the original patch. Please shout if I missed anything.
Thanks,
M.
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index aa7e8d592295..3e08dcc924b5 100644
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -115,29 +115,9 @@ SYM_CODE_START_LOCAL(mutate_to_vhe)
mrs_s x0, SYS_VBAR_EL12
msr vbar_el1, x0
- // Fixup SPE configuration, if supported...
- mrs x1, id_aa64dfr0_el1
- ubfx x1, x1, #ID_AA64DFR0_PMSVER_SHIFT, #4
- mov x2, xzr
- cbz x1, skip_spe
-
- // ... and not owned by EL3
- mrs_s x0, SYS_PMBIDR_EL1
- and x0, x0, #(1 << SYS_PMBIDR_EL1_P_SHIFT)
- cbnz x0, skip_spe
-
- // Let the SPE driver in control of the sampling
- mrs_s x0, SYS_PMSCR_EL1
- bic x0, x0, #(1 << SYS_PMSCR_EL2_PCT_SHIFT)
- bic x0, x0, #(1 << SYS_PMSCR_EL2_PA_SHIFT)
- msr_s SYS_PMSCR_EL1, x0
- mov x2, #MDCR_EL2_TPMS
-
-skip_spe:
- // For VHE, use EL2 translation and disable access from EL1
+ // Use EL2 translations for SPE and disable access from EL1
mrs x0, mdcr_el2
bic x0, x0, #(MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT)
- orr x0, x0, x2
msr mdcr_el2, x0
// Transfer the MM state from EL1 to EL2
--
Jazz is not dead. It just smells funny...
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next prev parent reply other threads:[~2021-02-04 9:31 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 11:56 [PATCH v6 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 01/21] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-02-05 12:01 ` Hector Martin 'marcan'
2021-02-05 14:04 ` Marc Zyngier
2021-02-06 14:29 ` Hector Martin 'marcan'
2021-02-01 11:56 ` [PATCH v6 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-02-03 21:13 ` Will Deacon
2021-02-04 9:30 ` Marc Zyngier [this message]
2021-02-04 9:34 ` Will Deacon
2021-02-04 9:50 ` Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-02-05 16:35 ` Will Deacon
2021-02-05 16:42 ` Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 16/21] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
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