From: Florian Fainelli <f.fainelli@gmail.com>
To: John Garry <john.garry@huawei.com>,
linux-kernel@vger.kernel.org, Will Deacon <will.deacon@arm.com>,
Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Ingo Molnar <mingo@redhat.com>,
Namhyung Kim <namhyung@kernel.org>, Jiri Olsa <jolsa@redhat.com>,
"moderated list:ARM PMU PROFILING AND DEBUGGING"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2] perf vendor events arm64: Add Cortex-A57 and Cortex-A72 events
Date: Fri, 10 May 2019 12:49:55 -0700 [thread overview]
Message-ID: <a8a3c429-307c-40fc-12b4-d62374bfda1d@gmail.com> (raw)
In-Reply-To: <5c04ebac-3e3c-fa53-d287-3a602a350091@huawei.com>
On 5/6/19 12:25 AM, John Garry wrote:
> On 03/05/2019 00:47, Florian Fainelli wrote:
>> The Cortex-A57 and Cortex-A72 both support all ARMv8 recommended events
>> up to the RC_ST_SPEC (0x91) event with the exception of:
>>
>> - L1D_CACHE_REFILL_INNER (0x44)
>> - L1D_CACHE_REFILL_OUTER (0x45)
>> - L1D_TLB_RD (0x4E)
>> - L1D_TLB_WR (0x4F)
>> - L2D_TLB_REFILL_RD (0x5C)
>> - L2D_TLB_REFILL_WR (0x5D)
>> - L2D_TLB_RD (0x5E)
>> - L2D_TLB_WR (0x5F)
>> - STREX_SPEC (0x6F)
>>
>> Create an appropriate JSON file for mapping those events and update the
>> mapfile.csv for matching the Cortex-A57 and Cortex-A72 MIDR to that
>> file.
>
> I suppose you could have also created separate a72 and a57 folders, and
> used a symbolic link for the json. That would have kept the folder
> structure consistent and neat.
Will, Mark, any preference on that? Either way works fine.
>
>>
>> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> Apart from the above:
>
> Reviewed-by: John Garry <john.garry@huawei.com>
Thanks
>
>> ---
>> Changes in v2:
>>
>> - added a shared directory for both Cortex-A57 and A72 (Will)
>> - removed unsupported ARMv8 v3 events (John)
>>
>> .../arm/cortex-a57-a72/core-imp-def.json | 179 ++++++++++++++++++
>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 2 +
>> 2 files changed, 181 insertions(+)
>> create mode 100644
>> tools/perf/pmu-events/arch/arm64/arm/cortex-a57-a72/core-imp-def.json
>>
>> diff --git a/tools/perf/pmu-even
>
--
Florian
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next prev parent reply other threads:[~2019-05-10 19:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-02 23:47 [PATCH v2] perf vendor events arm64: Add Cortex-A57 and Cortex-A72 events Florian Fainelli
2019-05-06 7:25 ` John Garry
2019-05-10 19:49 ` Florian Fainelli [this message]
2019-05-13 11:14 ` Will Deacon
2019-05-13 11:19 ` Will Deacon
2019-05-13 17:47 ` Florian Fainelli
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