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* [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
@ 2025-02-03 16:46 Uwe Kleine-König
  2025-02-03 16:46 ` [PATCH v3 1/2] dt-bindings: altera: Add compatible for Terasic's DE10-nano Uwe Kleine-König
                   ` (3 more replies)
  0 siblings, 4 replies; 10+ messages in thread
From: Uwe Kleine-König @ 2025-02-03 16:46 UTC (permalink / raw)
  To: Dinh Nguyen
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

Hello,

The only change since v2
(https://lore.kernel.org/linux-arm-kernel/20250130074553.92023-2-u.kleine-koenig@baylibre.com):
is that I added patch 1/2 that is supposed to fix the warning that I
failed to notice with the testing I did. Thanks to Krzysztof and Rob for
their patience with me. I hope I got it right now.

Best regards
Uwe

Uwe Kleine-König (2):
  dt-bindings: altera: Add compatible for Terasic's DE10-nano
  ARM: dts: socfpga: Add basic support for Terrasic's de10-nano

 .../devicetree/bindings/arm/altera.yaml       |  1 +
 arch/arm/boot/dts/intel/socfpga/Makefile      |  1 +
 .../socfpga/socfpga_cyclone5_de10nano.dts     | 95 +++++++++++++++++++
 3 files changed, 97 insertions(+)
 create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts

base-commit: 00f3246adeeacbda0bd0b303604e46eb59c32e6e
-- 
2.47.1



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 1/2] dt-bindings: altera: Add compatible for Terasic's DE10-nano
  2025-02-03 16:46 [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
@ 2025-02-03 16:46 ` Uwe Kleine-König
  2025-02-03 17:36   ` Krzysztof Kozlowski
  2025-02-03 16:46 ` [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 10+ messages in thread
From: Uwe Kleine-König @ 2025-02-03 16:46 UTC (permalink / raw)
  To: Dinh Nguyen
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

The Terasic DE10-nano development board features a Cyclone5 FPGA, USB,
HDMI output and an Arduino compatible header.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
---
 Documentation/devicetree/bindings/arm/altera.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
index 8c7575455422..30c44a0e6407 100644
--- a/Documentation/devicetree/bindings/arm/altera.yaml
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -47,6 +47,7 @@ properties:
               - novtech,chameleon96
               - samtec,vining
               - terasic,de0-atlas
+              - terasic,de10-nano
               - terasic,socfpga-cyclone5-sockit
           - const: altr,socfpga-cyclone5
           - const: altr,socfpga
-- 
2.47.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  2025-02-03 16:46 [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
  2025-02-03 16:46 ` [PATCH v3 1/2] dt-bindings: altera: Add compatible for Terasic's DE10-nano Uwe Kleine-König
@ 2025-02-03 16:46 ` Uwe Kleine-König
  2025-02-03 17:39   ` Krzysztof Kozlowski
  2025-03-03 14:03 ` [PATCH v3 0/2] " Uwe Kleine-König
  2025-03-04 12:46 ` Dinh Nguyen
  3 siblings, 1 reply; 10+ messages in thread
From: Uwe Kleine-König @ 2025-02-03 16:46 UTC (permalink / raw)
  To: Dinh Nguyen
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

This dts is enough to make the board boot to Linux with the rootfs on
a micro SD card.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
---
 arch/arm/boot/dts/intel/socfpga/Makefile      |  1 +
 .../socfpga/socfpga_cyclone5_de10nano.dts     | 95 +++++++++++++++++++
 2 files changed, 96 insertions(+)
 create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts

diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/intel/socfpga/Makefile
index c467828aeb4b..7f69a0355ea5 100644
--- a/arch/arm/boot/dts/intel/socfpga/Makefile
+++ b/arch/arm/boot/dts/intel/socfpga/Makefile
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
 	socfpga_cyclone5_mcvevk.dtb \
 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_de0_nano_soc.dtb \
+	socfpga_cyclone5_de10nano.dtb \
 	socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb \
 	socfpga_cyclone5_sodia.dtb \
diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts
new file mode 100644
index 000000000000..ec25106caacf
--- /dev/null
+++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017, Intel Corporation
+ *
+ * based on socfpga_cyclone5_de0_nano_soc.dts
+ */
+/dts-v1/;
+
+#include "socfpga_cyclone5.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Terasic DE10-Nano";
+	compatible = "terasic,de10-nano", "altr,socfpga-cyclone5", "altr,socfpga";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		/* 1 GiB */
+		device_type = "memory";
+		reg = <0x0 0x40000000>;
+	};
+
+	soc {
+		fpga: bus@ff200000 {
+			compatible = "simple-bus";
+			reg = <0xff200000 0x00200000>;
+			ranges = <0x00000000 0xff200000 0x00200000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/*
+			 * Here the devices will appear if an FPGA image is
+			 * loaded. Their description is expected to be added
+			 * using a device tree overlay that matches the image.
+			 */
+		};
+	};
+};
+
+&gmac1 {
+	/* Uses a KSZ9031RNX phy */
+	phy-mode = "rgmii-id";
+	rxd0-skew-ps = <420>;
+	rxd1-skew-ps = <420>;
+	rxd2-skew-ps = <420>;
+	rxd3-skew-ps = <420>;
+	txen-skew-ps = <0>;
+	rxdv-skew-ps = <420>;
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	accelerometer@53 {
+		compatible = "adi,adxl345";
+		reg = <0x53>;
+		/* HPS_GSENSOR_INT is routed to UART0_RX/CAN0_RX/SPIM0_SS1/HPS_GPIO61 */
+		interrupt-parent = <&portc>;
+		interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "INT1";
+	};
+};
+
+&mmc0 {
+	/* micro SD card socket J11 */
+	status = "okay";
+};
+
+&uart0 {
+	/*
+	 * Accessible via USB (FT232R) on Mini-USB plug J4
+	 * RX = TRACE_D0/SPIS0_CLK/UART0_RX/HPS_GPIO49
+	 * TX = TRACE_D1/SPIS0_MOSI/UART0_TX/HPS_GPIO50
+	 * no handshaking lines
+	 */
+	clock-frequency = <100000000>;
+};
-- 
2.47.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/2] dt-bindings: altera: Add compatible for Terasic's DE10-nano
  2025-02-03 16:46 ` [PATCH v3 1/2] dt-bindings: altera: Add compatible for Terasic's DE10-nano Uwe Kleine-König
@ 2025-02-03 17:36   ` Krzysztof Kozlowski
  0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-03 17:36 UTC (permalink / raw)
  To: Uwe Kleine-König, Dinh Nguyen
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

On 03/02/2025 17:46, Uwe Kleine-König wrote:
> The Terasic DE10-nano development board features a Cyclone5 FPGA, USB,
> HDMI output and an Arduino compatible header.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
> ---
>  Documentation/devicetree/bindings/arm/altera.yaml | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  2025-02-03 16:46 ` [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
@ 2025-02-03 17:39   ` Krzysztof Kozlowski
  2025-02-04  7:12     ` Uwe Kleine-König
  0 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-03 17:39 UTC (permalink / raw)
  To: Uwe Kleine-König, Dinh Nguyen
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

On 03/02/2025 17:46, Uwe Kleine-König wrote:
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	memory@0 {
> +		/* 1 GiB */
> +		device_type = "memory";
> +		reg = <0x0 0x40000000>;
> +	};
> +
> +	soc {
> +		fpga: bus@ff200000 {
> +			compatible = "simple-bus";
> +			reg = <0xff200000 0x00200000>;


Are you sure simple-bus allows this? IOW, no warnings from simple-bus
schema? To my knowledge, simple-bus allows only objects, except the few
allowed properties (and reg is not allowed because it is bus, not a device).

Nice coincidence with other patchset from Intel also claiming FPGA with
resources is the bus, although there it could be root port.

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  2025-02-03 17:39   ` Krzysztof Kozlowski
@ 2025-02-04  7:12     ` Uwe Kleine-König
  2025-02-04  7:27       ` Krzysztof Kozlowski
  0 siblings, 1 reply; 10+ messages in thread
From: Uwe Kleine-König @ 2025-02-04  7:12 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	devicetree, linux-arm-kernel

[-- Attachment #1: Type: text/plain, Size: 1469 bytes --]

On Mon, Feb 03, 2025 at 06:39:09PM +0100, Krzysztof Kozlowski wrote:
> On 03/02/2025 17:46, Uwe Kleine-König wrote:
> > +
> > +	chosen {
> > +		stdout-path = "serial0:115200n8";
> > +	};
> > +
> > +	memory@0 {
> > +		/* 1 GiB */
> > +		device_type = "memory";
> > +		reg = <0x0 0x40000000>;
> > +	};
> > +
> > +	soc {
> > +		fpga: bus@ff200000 {
> > +			compatible = "simple-bus";
> > +			reg = <0xff200000 0x00200000>;
> 
> 
> Are you sure simple-bus allows this? IOW, no warnings from simple-bus
> schema? To my knowledge, simple-bus allows only objects, except the few
> allowed properties (and reg is not allowed because it is bus, not a device).

I double checked to have a recent dtschema[1] and removing the reg line
doesn't change the output of

	make [...] intel/socfpga/socfpga_cyclone5_de10nano.dtb CHECK_DTBS=1

But I agree that in the presence of

	ranges = <0x00000000 0xff200000 0x00200000>;

the reg property isn't useful.

I'll wait a bit for more comments and then will send a v4 without that
reg line. (Unless Dinh is happy with my patch otherwise and applies it
fixing up for this issue themselves. *hinthint* :-)

> Nice coincidence with other patchset from Intel also claiming FPGA with
> resources is the bus, although there it could be root port.

There results no action item for me from this statement, right?

Best regards
Uwe

[1] pip3 install dtschema --upgrade --user --break-system-packages

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  2025-02-04  7:12     ` Uwe Kleine-König
@ 2025-02-04  7:27       ` Krzysztof Kozlowski
  0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-04  7:27 UTC (permalink / raw)
  To: Uwe Kleine-König
  Cc: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	devicetree, linux-arm-kernel

On 04/02/2025 08:12, Uwe Kleine-König wrote:
>>
>> Are you sure simple-bus allows this? IOW, no warnings from simple-bus
>> schema? To my knowledge, simple-bus allows only objects, except the few
>> allowed properties (and reg is not allowed because it is bus, not a device).
> 
> I double checked to have a recent dtschema[1] and removing the reg line
> doesn't change the output of
> 
> 	make [...] intel/socfpga/socfpga_cyclone5_de10nano.dtb CHECK_DTBS=1
> 
> But I agree that in the presence of
> 
> 	ranges = <0x00000000 0xff200000 0x00200000>;
> 
> the reg property isn't useful.

I guess it is fine, no warnings and there are many other examples of
simple-buses with reg, although to me it still feels like ranges is more
appropriate.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  2025-02-03 16:46 [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
  2025-02-03 16:46 ` [PATCH v3 1/2] dt-bindings: altera: Add compatible for Terasic's DE10-nano Uwe Kleine-König
  2025-02-03 16:46 ` [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
@ 2025-03-03 14:03 ` Uwe Kleine-König
  2025-03-04 12:46 ` Dinh Nguyen
  3 siblings, 0 replies; 10+ messages in thread
From: Uwe Kleine-König @ 2025-03-03 14:03 UTC (permalink / raw)
  To: Dinh Nguyen
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

[-- Attachment #1: Type: text/plain, Size: 749 bytes --]

Hello Dinh,

On Mon, Feb 03, 2025 at 05:46:35PM +0100, Uwe Kleine-König wrote:
> The only change since v2
> (https://lore.kernel.org/linux-arm-kernel/20250130074553.92023-2-u.kleine-koenig@baylibre.com):
> is that I added patch 1/2 that is supposed to fix the warning that I
> failed to notice with the testing I did. Thanks to Krzysztof and Rob for
> their patience with me. I hope I got it right now.

I didn't hear anything from your side on this patch set and I don't see
it applied in next. Do you still have it on your radar?

If you prefer me dropping the reg property on the fpga node, please
tell me. Otherwise you dropping it on application is fine for me and
keeping it is fine for the dt people, too.

Best regards
Uwe

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  2025-02-03 16:46 [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
                   ` (2 preceding siblings ...)
  2025-03-03 14:03 ` [PATCH v3 0/2] " Uwe Kleine-König
@ 2025-03-04 12:46 ` Dinh Nguyen
  2025-03-24 10:01   ` Uwe Kleine-König
  3 siblings, 1 reply; 10+ messages in thread
From: Dinh Nguyen @ 2025-03-04 12:46 UTC (permalink / raw)
  To: Uwe Kleine-König
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

On 2/3/25 10:46, Uwe Kleine-König wrote:
> Hello,
> 
> The only change since v2
> (https://lore.kernel.org/linux-arm-kernel/20250130074553.92023-2-u.kleine-koenig@baylibre.com):
> is that I added patch 1/2 that is supposed to fix the warning that I
> failed to notice with the testing I did. Thanks to Krzysztof and Rob for
> their patience with me. I hope I got it right now.
> 
> Best regards
> Uwe
> 
> Uwe Kleine-König (2):
>    dt-bindings: altera: Add compatible for Terasic's DE10-nano
>    ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
> 
>   .../devicetree/bindings/arm/altera.yaml       |  1 +
>   arch/arm/boot/dts/intel/socfpga/Makefile      |  1 +
>   .../socfpga/socfpga_cyclone5_de10nano.dts     | 95 +++++++++++++++++++
>   3 files changed, 97 insertions(+)
>   create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts
> 
> base-commit: 00f3246adeeacbda0bd0b303604e46eb59c32e6e

Applied!

Thanks,
Dinh


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  2025-03-04 12:46 ` Dinh Nguyen
@ 2025-03-24 10:01   ` Uwe Kleine-König
  0 siblings, 0 replies; 10+ messages in thread
From: Uwe Kleine-König @ 2025-03-24 10:01 UTC (permalink / raw)
  To: Dinh Nguyen
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel

[-- Attachment #1: Type: text/plain, Size: 2058 bytes --]

Hello,

On Tue, Mar 04, 2025 at 06:46:18AM -0600, Dinh Nguyen wrote:
> On 2/3/25 10:46, Uwe Kleine-König wrote:
> > Hello,
> > 
> > The only change since v2
> > (https://lore.kernel.org/linux-arm-kernel/20250130074553.92023-2-u.kleine-koenig@baylibre.com):
> > is that I added patch 1/2 that is supposed to fix the warning that I
> > failed to notice with the testing I did. Thanks to Krzysztof and Rob for
> > their patience with me. I hope I got it right now.
> > 
> > Best regards
> > Uwe
> > 
> > Uwe Kleine-König (2):
> >    dt-bindings: altera: Add compatible for Terasic's DE10-nano
> >    ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
> > 
> >   .../devicetree/bindings/arm/altera.yaml       |  1 +
> >   arch/arm/boot/dts/intel/socfpga/Makefile      |  1 +
> >   .../socfpga/socfpga_cyclone5_de10nano.dts     | 95 +++++++++++++++++++
> >   3 files changed, 97 insertions(+)
> >   create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts
> > 
> > base-commit: 00f3246adeeacbda0bd0b303604e46eb59c32e6e
> 
> Applied!

Thanks!

I would have expected that patch to pop up on
https://web.git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.15
in the mean time, but it's not there. Is it still scheduled to go into
mainline?

Having said that, that branch looks really strange. It contains:

	$ git show --format=fuller 2445fc2d7863
	commit 2445fc2d786304c38934199b1f95a9e52be0cec9
	Author:     Linus Torvalds <torvalds@linux-foundation.org>
	AuthorDate: Sun Feb 9 12:45:03 2025 -0800
	Commit:     Dinh Nguyen <dinguyen@kernel.org>
	CommitDate: Wed Feb 19 06:32:34 2025 -0600

	    Linux 6.14-rc2

	diff --git a/Makefile b/Makefile
	index 9e0d63d9d94b..89628e354ca7 100644
	--- a/Makefile
	+++ b/Makefile
	@@ -2,7 +2,7 @@
	 VERSION = 6
	 PATCHLEVEL = 14
	 SUBLEVEL = 0
	-EXTRAVERSION = -rc1
	+EXTRAVERSION = -rc2
	 NAME = Baby Opossum Posse

	 # *DOCUMENTATION*

I assume this is a rebase accident? 

Best regards
Uwe

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^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2025-03-24 10:06 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-03 16:46 [PATCH v3 0/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
2025-02-03 16:46 ` [PATCH v3 1/2] dt-bindings: altera: Add compatible for Terasic's DE10-nano Uwe Kleine-König
2025-02-03 17:36   ` Krzysztof Kozlowski
2025-02-03 16:46 ` [PATCH v3 2/2] ARM: dts: socfpga: Add basic support for Terrasic's de10-nano Uwe Kleine-König
2025-02-03 17:39   ` Krzysztof Kozlowski
2025-02-04  7:12     ` Uwe Kleine-König
2025-02-04  7:27       ` Krzysztof Kozlowski
2025-03-03 14:03 ` [PATCH v3 0/2] " Uwe Kleine-König
2025-03-04 12:46 ` Dinh Nguyen
2025-03-24 10:01   ` Uwe Kleine-König

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as well as URLs for NNTP newsgroup(s).