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From: Niklas Cassel <cassel@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
	lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
	heiko@sntech.de, manivannan.sadhasivam@linaro.org,
	robh@kernel.org, jingoohan1@gmail.com,
	thomas.richard@bootlin.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH] PCI: dw-rockchip: Configure max payload size on host init
Date: Thu, 17 Apr 2025 10:39:49 +0200	[thread overview]
Message-ID: <aAC-VTqJpCqcz6NK@ryzen> (raw)
In-Reply-To: <52a2f6dc-1e13-4473-80f2-989379df4e95@163.com>

On Thu, Apr 17, 2025 at 04:07:51PM +0800, Hans Zhang wrote:
> On 2025/4/17 15:48, Niklas Cassel wrote:
> 
> Hi Niklas and Shawn,
> 
> Thank you very much for your discussion and reply.
> 
> I tested it on RK3588 and our platform. By setting pci=pcie_bus_safe, the
> maximum MPS will be automatically matched in the end.
> 
> So is my patch no longer needed? For RK3588, does the customer have to
> configure CONFIG_PCIE_BUS_SAFE or pci=pcie_bus_safe?
> 
> Also, for pci-meson.c, can the meson_set_max_payload be deleted?

I think the only reason why this works is because
pcie_bus_configure_settings(), in the case of
pcie_bus_config == PCIE_BUS_SAFE, will walk the bus and set MPS in
the bridge to the lowest of the downstream devices:
https://github.com/torvalds/linux/blob/v6.15-rc2/drivers/pci/probe.c#L2994-L2999


So Hans, if you look at lspci for the other RCs/bridges that don't
have any downstream devices connected, do they also show DevCtl.MPS 256B
or do they still show 128B ?


One could argue that for all policies (execept for maybe PCIE_BUS_TUNE_OFF),
pcie_bus_configure_settings() should start off by initializing DevCtl.MPS to
DevCap.MPS (for the bridge itself), and after that pcie_bus_configure_settings()
can override it depending on policy, e.g. set MPS to 128B in case of
pcie_bus_config == PCIE_BUS_PEER2PEER, or walk the bus in case of
pcie_bus_config == PCIE_BUS_SAFE.

That way, we should be able to remove the setting for pci-meson.c as well.

Bjorn, thoughts?


Kind regards,
Niklas


  reply	other threads:[~2025-04-17  8:42 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-16 15:19 [PATCH] PCI: dw-rockchip: Configure max payload size on host init Hans Zhang
2025-04-16 20:40 ` Bjorn Helgaas
2025-04-17  2:19   ` Hans Zhang
2025-04-17  6:01     ` Niklas Cassel
2025-04-17  6:47       ` Hans Zhang
2025-04-17  6:53         ` Niklas Cassel
2025-04-17  7:04 ` Niklas Cassel
2025-04-17  7:08   ` Shawn Lin
2025-04-17  7:22     ` Niklas Cassel
2025-04-17  7:25       ` Shawn Lin
2025-04-17  7:48         ` Niklas Cassel
2025-04-17  8:07           ` Hans Zhang
2025-04-17  8:39             ` Niklas Cassel [this message]
2025-04-17  9:48               ` Hans Zhang
2025-04-17  9:54                 ` Niklas Cassel
2025-04-17 16:52               ` Bjorn Helgaas
2025-04-18 12:33                 ` Hans Zhang
2025-04-18 14:55                   ` Niklas Cassel
2025-04-18 16:21                     ` Bjorn Helgaas
2025-04-18 17:21                     ` Hans Zhang
2025-04-21 14:53                       ` Manivannan Sadhasivam
2025-04-21 15:59                         ` Hans Zhang
2025-04-21 14:48               ` Manivannan Sadhasivam

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