[PATCH v6 0/3] Add i.MX943 basic dts support

[PATCH v6 0/3] Add i.MX943 basic dts support

[Jacky Bai]

i.MX943 is the first SoC of the i.MX94 family, all the SoCs of this family
are pin to pin compatible with only several peripherals differance.

For i.MX943 device tree support, we split the dtsi into two part, one for
the common dtsi that shared for the i.MX94 family, and an i.MX943 specific
part.

Jacky Bai (3):
  dt-bindings: arm: fsl: add i.MX943 EVK board
  arm64: dts: freescale: Add basic dtsi for imx943
  arm64: dts: freescale: Add minimal dts support for imx943 evk

 .../devicetree/bindings/arm/fsl.yaml          |    6 +
 arch/arm64/boot/dts/freescale/Makefile        |    1 +
 arch/arm64/boot/dts/freescale/imx94-clock.h   |  195 ++
 arch/arm64/boot/dts/freescale/imx94-pinfunc.h | 1570 +++++++++++++++++
 arch/arm64/boot/dts/freescale/imx94-power.h   |   41 +
 arch/arm64/boot/dts/freescale/imx94.dtsi      | 1148 ++++++++++++
 arch/arm64/boot/dts/freescale/imx943-evk.dts  |  195 ++
 arch/arm64/boot/dts/freescale/imx943.dtsi     |  148 ++
 8 files changed, 3304 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx94-clock.h
 create mode 100644 arch/arm64/boot/dts/freescale/imx94-pinfunc.h
 create mode 100644 arch/arm64/boot/dts/freescale/imx94-power.h
 create mode 100644 arch/arm64/boot/dts/freescale/imx94.dtsi
 create mode 100644 arch/arm64/boot/dts/freescale/imx943-evk.dts
 create mode 100644 arch/arm64/boot/dts/freescale/imx943.dtsi

-- 
2.34.1

[PATCH v6 1/3] dt-bindings: arm: fsl: add i.MX943 EVK board

[Jacky Bai]

Add DT compatible string for NXP i.MX943 EVK board.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 - v6 changes:
  - no

 - v5 changes:
  - no
---
 Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 1b90870958a2..873f9eb25cda 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1347,6 +1347,12 @@ properties:
               - fsl,imx93-14x14-evk       # i.MX93 14x14 EVK Board
           - const: fsl,imx93
 
+      - description: i.MX94 based Boards
+        items:
+          - enum:
+              - fsl,imx943-evk            # i.MX943 EVK Board
+          - const: fsl,imx94
+
       - description: i.MX95 based Boards
         items:
           - enum:
-- 
2.34.1

[PATCH v6 3/3] arm64: dts: freescale: Add minimal dts support for imx943 evk

[Jacky Bai]

Add the minimal board dts support for i.MX943 EVK. Only the console uart,
SD & eMMC are enabled for linux basic boot.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
 - v6 changes:
  - reorder the build entry in Makefile alphabetically
  - remove unused sleep pinctrl for usdhc node
  - add no-mmc, no-sdio properties for usdhc2 as it is used for SD card

 - v5 changes:
  - remove the unused and not documented 'fsl,cd-gpio-wakeup-disable'
    property from usdhc node.

 - v4 changes:
  - no

 - v3 changes:
  - no

 - v2 changes:
  - newly added for board dts
---
 arch/arm64/boot/dts/freescale/Makefile       |   1 +
 arch/arm64/boot/dts/freescale/imx943-evk.dts | 195 +++++++++++++++++++
 2 files changed, 196 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx943-evk.dts

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index b6d3fe26d621..48da25620db9 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -301,6 +301,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb
 
diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts
new file mode 100644
index 000000000000..cc8f3e6a1789
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts
@@ -0,0 +1,195 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2025 NXP
+ */
+
+/dts-v1/;
+
+#include "imx943.dtsi"
+
+/ {
+	compatible = "fsl,imx943-evk", "fsl,imx94";
+	model = "NXP i.MX943 EVK board";
+
+	aliases {
+		mmc0 = &usdhc1;
+		mmc1 = &usdhc2;
+		serial0 = &lpuart1;
+	};
+
+	chosen {
+		stdout-path = &lpuart1;
+	};
+
+	reg_usdhc2_vmmc: regulator-usdhc2 {
+		compatible = "regulator-fixed";
+		off-on-delay-us = <12000>;
+		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+		pinctrl-names = "default";
+		regulator-max-microvolt = <3300000>;
+		regulator-min-microvolt = <3300000>;
+		regulator-name = "VDD_SD2_3V3";
+		gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reserved-memory {
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		linux,cma {
+			compatible = "shared-dma-pool";
+			alloc-ranges = <0 0x80000000 0 0x7f000000>;
+			reusable;
+			size = <0 0x10000000>;
+			linux,cma-default;
+		};
+	};
+
+	memory@80000000 {
+		reg = <0x0 0x80000000 0x0 0x80000000>;
+		device_type = "memory";
+	};
+};
+
+&lpuart1 {
+	pinctrl-0 = <&pinctrl_uart1>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&scmi_iomuxc {
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			IMX94_PAD_UART1_TXD__LPUART1_TX		0x31e
+			IMX94_PAD_UART1_RXD__LPUART1_RX		0x31e
+		>;
+	};
+
+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
+		fsl,pins = <
+			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x158e
+			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x138e
+			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x138e
+			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x138e
+			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x138e
+			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x138e
+			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x138e
+			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x138e
+			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x138e
+			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x138e
+			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x158e
+		>;
+	};
+
+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
+		fsl,pins = <
+			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x15fe
+			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x13fe
+			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x13fe
+			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x13fe
+			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x13fe
+			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x13fe
+			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x13fe
+			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x13fe
+			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x13fe
+			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x13fe
+			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x15fe
+		>;
+	};
+
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x158e
+			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x138e
+			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x138e
+			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x138e
+			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x138e
+			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x138e
+			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x138e
+			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x138e
+			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x138e
+			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x138e
+			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x158e
+		>;
+	};
+
+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+		fsl,pins = <
+			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x158e
+			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x138e
+			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x138e
+			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x138e
+			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x138e
+			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x138e
+			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+		fsl,pins = <
+			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x15fe
+			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x13fe
+			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x13fe
+			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x13fe
+			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x13fe
+			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x13fe
+			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
+		>;
+	};
+
+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+		fsl,pins = <
+			IMX94_PAD_SD2_CD_B__GPIO4_IO20		0x31e
+		>;
+	};
+
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x158e
+			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x138e
+			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x138e
+			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x138e
+			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x138e
+			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x138e
+			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
+		>;
+	};
+
+	pinctrl_reg_usdhc2_vmmc: usdhc2regvmmcgrp {
+		fsl,pins = <
+			IMX94_PAD_SD2_RESET_B__GPIO4_IO27	0x31e
+		>;
+	};
+};
+
+&usdhc1 {
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	bus-width = <8>;
+	non-removable;
+	no-sdio;
+	no-sd;
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	bus-width = <4>;
+	no-mmc;
+	no-sdio;
+	cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&reg_usdhc2_vmmc>;
+	status = "okay";
+};
+
+&wdog3 {
+	fsl,ext-reset-output;
+	status = "okay";
+};
-- 
2.34.1

Re: [PATCH v6 2/3] arm64: dts: freescale: Add basic dtsi for imx943

[Shawn Guo]

On Mon, Apr 21, 2025 at 02:51:38PM +0800, Jacky Bai wrote:
> Add the minimal dtsi support for i.MX943. i.MX943 is the first SoC of
> i.MX94 Family, create a common dtsi for the whole i.MX94 family, and the
> specific dtsi part for i.MX943.
> 
> The clock, power domain and perf index need to be used by the device nodes
> for resource reference, add them along with the dtsi support.
> 
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> ---
>  - v6 changes:
>   - refine the indentation of edma irq property.
> 
>  - v5 changes:
>   - remove the err irq of edma node as the err irq support in driver is not
>     ready. We can add it back when the driver is ready. No impact for current
>     edma support.
> 
>  - v4 changes:
>   - reorder the cpu node compatible string property as suggested by Frank
> 
>  - v3 changes:
>   - remove the blank line
>   - add PAD config macro define as suggested by Frank Li
>   - update the device nodes compatible strings for imx94 as suggested by Krzysztof
> 
>  - v2 changes:
>   - remove the unnecessary macro define in clock header as suggested by Krzysztof
>   - split the dtsi into imx94.dtsi and imx943.dtsi
>   - use low case in the pinfunc header as Frank suggested
>   - reorder the device nodes and properties
> ---
>  arch/arm64/boot/dts/freescale/imx94-clock.h   |  195 ++

I forgot to ask when imx95-clock.h was first introduced.  But how will
clk drivers use these clock IDs, or will clk drivers have their own copy
of definitions?

>  arch/arm64/boot/dts/freescale/imx94-pinfunc.h | 1570 +++++++++++++++++
>  arch/arm64/boot/dts/freescale/imx94-power.h   |   41 +

Same question on the power IDs.

>  arch/arm64/boot/dts/freescale/imx94.dtsi      | 1148 ++++++++++++
>  arch/arm64/boot/dts/freescale/imx943.dtsi     |  148 ++
>  5 files changed, 3102 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx94-clock.h
>  create mode 100644 arch/arm64/boot/dts/freescale/imx94-pinfunc.h
>  create mode 100644 arch/arm64/boot/dts/freescale/imx94-power.h
>  create mode 100644 arch/arm64/boot/dts/freescale/imx94.dtsi
>  create mode 100644 arch/arm64/boot/dts/freescale/imx943.dtsi
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx94-clock.h b/arch/arm64/boot/dts/freescale/imx94-clock.h
> new file mode 100644
> index 000000000000..84ad3d53c29b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx94-clock.h
> @@ -0,0 +1,195 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
> +/*
> + * Copyright 2024-2025 NXP
> + */
> +
> +#ifndef __CLOCK_IMX94_H
> +#define __CLOCK_IMX94_H

Can we name it __IMX94_CLOCK_H to match the file name?

> +
> +#define IMX94_CLK_EXT				0
> +#define IMX94_CLK_32K				1
> +#define IMX94_CLK_24M				2
> +#define IMX94_CLK_FRO				3
> +#define IMX94_CLK_SYSPLL1_VCO			4
> +#define IMX94_CLK_SYSPLL1_PFD0_UNGATED		5
> +#define IMX94_CLK_SYSPLL1_PFD0			6
> +#define IMX94_CLK_SYSPLL1_PFD0_DIV2		7
> +#define IMX94_CLK_SYSPLL1_PFD1_UNGATED		8
> +#define IMX94_CLK_SYSPLL1_PFD1			9
> +#define IMX94_CLK_SYSPLL1_PFD1_DIV2		10
> +#define IMX94_CLK_SYSPLL1_PFD2_UNGATED		11
> +#define IMX94_CLK_SYSPLL1_PFD2			12
> +#define IMX94_CLK_SYSPLL1_PFD2_DIV2		13
> +#define IMX94_CLK_AUDIOPLL1_VCO			14
> +#define IMX94_CLK_AUDIOPLL1			15
> +#define IMX94_CLK_AUDIOPLL2_VCO			16
> +#define IMX94_CLK_AUDIOPLL2			17
> +#define IMX94_CLK_RESERVED18			18
> +#define IMX94_CLK_RESERVED19			19
> +#define IMX94_CLK_RESERVED20			20
> +#define IMX94_CLK_RESERVED21			21
> +#define IMX94_CLK_RESERVED22			22
> +#define IMX94_CLK_RESERVED23			23
> +#define IMX94_CLK_ENCPLL_VCO			24
> +#define IMX94_CLK_ENCPLL_PFD0_UNGATED		25
> +#define IMX94_CLK_ENCPLL_PFD0			26
> +#define IMX94_CLK_ENCPLL_PFD1_UNGATED		27
> +#define IMX94_CLK_ENCPLL_PFD1			28
> +#define IMX94_CLK_ARMPLL_VCO			29
> +#define IMX94_CLK_ARMPLL_PFD0_UNGATED		30
> +#define IMX94_CLK_ARMPLL_PFD0			31
> +#define IMX94_CLK_ARMPLL_PFD1_UNGATED		32
> +#define IMX94_CLK_ARMPLL_PFD1			33
> +#define IMX94_CLK_ARMPLL_PFD2_UNGATED		34
> +#define IMX94_CLK_ARMPLL_PFD2			35
> +#define IMX94_CLK_ARMPLL_PFD3_UNGATED		36
> +#define IMX94_CLK_ARMPLL_PFD3			37
> +#define IMX94_CLK_DRAMPLL_VCO			38
> +#define IMX94_CLK_DRAMPLL			39
> +#define IMX94_CLK_HSIOPLL_VCO			40
> +#define IMX94_CLK_HSIOPLL			41
> +#define IMX94_CLK_LDBPLL_VCO			42
> +#define IMX94_CLK_LDBPLL			43
> +#define IMX94_CLK_EXT1				44
> +#define IMX94_CLK_EXT2				45
> +

Why this newline?

> +#define IMX94_CLK_ADC				46
> +#define IMX94_CLK_BUSAON			47
> +#define IMX94_CLK_CAN1				48
> +#define IMX94_CLK_GLITCHFILTER			49
> +#define IMX94_CLK_GPT1				50
> +#define IMX94_CLK_I3C1SLOW			51
> +#define IMX94_CLK_LPI2C1			52
> +#define IMX94_CLK_LPI2C2			53
> +#define IMX94_CLK_LPSPI1			54
> +#define IMX94_CLK_LPSPI2			55
> +#define IMX94_CLK_LPTMR1			56
> +#define IMX94_CLK_LPUART1			57
> +#define IMX94_CLK_LPUART2			58
> +#define IMX94_CLK_M33				59
> +#define IMX94_CLK_M33SYSTICK			60
> +#define IMX94_CLK_PDM				61
> +#define IMX94_CLK_SAI1				62
> +#define IMX94_CLK_TPM2				63
> +#define IMX94_CLK_A55				64
> +#define IMX94_CLK_A55MTRBUS			65
> +#define IMX94_CLK_A55PERIPH			66
> +#define IMX94_CLK_DRAMALT			67
> +#define IMX94_CLK_DRAMAPB			68
> +#define IMX94_CLK_DISPAPB			69
> +#define IMX94_CLK_DISPAXI			70
> +#define IMX94_CLK_DISPPIX			71
> +#define IMX94_CLK_HSIOACSCAN480M		72
> +#define IMX94_CLK_HSIOACSCAN80M			73
> +#define IMX94_CLK_HSIO				74
> +#define IMX94_CLK_HSIOPCIEAUX			75
> +#define IMX94_CLK_HSIOPCIETEST160M		76
> +#define IMX94_CLK_HSIOPCIETEST400M		77
> +#define IMX94_CLK_HSIOPCIETEST500M		78
> +#define IMX94_CLK_HSIOPCIETEST50M		79
> +#define IMX94_CLK_HSIOUSBTEST60M		80
> +#define IMX94_CLK_BUSM70			81
> +#define IMX94_CLK_M70				82
> +#define IMX94_CLK_M70SYSTICK			83
> +#define IMX94_CLK_BUSM71			84
> +#define IMX94_CLK_M71				85
> +#define IMX94_CLK_M71SYSTICK			86
> +#define IMX94_CLK_BUSNETCMIX			87
> +#define IMX94_CLK_ECAT				88
> +#define IMX94_CLK_ENET				89
> +#define IMX94_CLK_ENETPHYTEST200M		90
> +#define IMX94_CLK_ENETPHYTEST500M		91
> +#define IMX94_CLK_ENETPHYTEST667M		92
> +#define IMX94_CLK_ENETREF			93
> +#define IMX94_CLK_ENETTIMER1			94
> +#define IMX94_CLK_ENETTIMER2			95
> +#define IMX94_CLK_ENETTIMER3			96
> +#define IMX94_CLK_FLEXIO3			97
> +#define IMX94_CLK_FLEXIO4			98
> +#define IMX94_CLK_M33SYNC			99
> +#define IMX94_CLK_M33SYNCSYSTICK		100
> +#define IMX94_CLK_MAC0				101
> +#define IMX94_CLK_MAC1				102
> +#define IMX94_CLK_MAC2				103
> +#define IMX94_CLK_MAC3				104
> +#define IMX94_CLK_MAC4				105
> +#define IMX94_CLK_MAC5				106
> +#define IMX94_CLK_NOCAPB			107
> +#define IMX94_CLK_NOC				108
> +#define IMX94_CLK_NPUAPB			109
> +#define IMX94_CLK_NPU				110
> +#define IMX94_CLK_CCMCKO1			111
> +#define IMX94_CLK_CCMCKO2			112
> +#define IMX94_CLK_CCMCKO3			113
> +#define IMX94_CLK_CCMCKO4			114
> +#define IMX94_CLK_BISS				115
> +#define IMX94_CLK_BUSWAKEUP			116
> +#define IMX94_CLK_CAN2				117
> +#define IMX94_CLK_CAN3				118
> +#define IMX94_CLK_CAN4				119
> +#define IMX94_CLK_CAN5				120
> +#define IMX94_CLK_ENDAT21			121
> +#define IMX94_CLK_ENDAT22			122
> +#define IMX94_CLK_ENDAT31FAST			123
> +#define IMX94_CLK_ENDAT31SLOW			124
> +#define IMX94_CLK_FLEXIO1			125
> +#define IMX94_CLK_FLEXIO2			126
> +#define IMX94_CLK_GPT2				127
> +#define IMX94_CLK_GPT3				128
> +#define IMX94_CLK_GPT4				129
> +#define IMX94_CLK_HIPERFACE1			130
> +#define IMX94_CLK_HIPERFACE1SYNC		131
> +#define IMX94_CLK_HIPERFACE2			132
> +#define IMX94_CLK_HIPERFACE2SYNC		133
> +#define IMX94_CLK_I3C2SLOW			134
> +#define IMX94_CLK_LPI2C3			135
> +#define IMX94_CLK_LPI2C4			136
> +#define IMX94_CLK_LPI2C5			137
> +#define IMX94_CLK_LPI2C6			138
> +#define IMX94_CLK_LPI2C7			139
> +#define IMX94_CLK_LPI2C8			140
> +#define IMX94_CLK_LPSPI3			141
> +#define IMX94_CLK_LPSPI4			142
> +#define IMX94_CLK_LPSPI5			143
> +#define IMX94_CLK_LPSPI6			144
> +#define IMX94_CLK_LPSPI7			145
> +#define IMX94_CLK_LPSPI8			146
> +#define IMX94_CLK_LPTMR2			147
> +#define IMX94_CLK_LPUART10			148
> +#define IMX94_CLK_LPUART11			149
> +#define IMX94_CLK_LPUART12			150
> +#define IMX94_CLK_LPUART3			151
> +#define IMX94_CLK_LPUART4			152
> +#define IMX94_CLK_LPUART5			153
> +#define IMX94_CLK_LPUART6			154
> +#define IMX94_CLK_LPUART7			155
> +#define IMX94_CLK_LPUART8			156
> +#define IMX94_CLK_LPUART9			157
> +#define IMX94_CLK_SAI2				158
> +#define IMX94_CLK_SAI3				159
> +#define IMX94_CLK_SAI4				160
> +#define IMX94_CLK_SWOTRACE			161
> +#define IMX94_CLK_TPM4				162
> +#define IMX94_CLK_TPM5				163
> +#define IMX94_CLK_TPM6				164
> +#define IMX94_CLK_USBPHYBURUNIN			165
> +#define IMX94_CLK_USDHC1			166
> +#define IMX94_CLK_USDHC2			167
> +#define IMX94_CLK_USDHC3			168
> +#define IMX94_CLK_V2XPK				169
> +#define IMX94_CLK_WAKEUPAXI			170
> +#define IMX94_CLK_XSPISLVROOT			171
> +#define IMX94_CLK_XSPI1				172
> +#define IMX94_CLK_XSPI2				173
> +

And this?

> +#define IMX94_CLK_SEL_EXT			174
> +#define IMX94_CLK_SEL_A55C0			175
> +#define IMX94_CLK_SEL_A55C1			176
> +#define IMX94_CLK_SEL_A55C2			177
> +#define IMX94_CLK_SEL_A55C3			178
> +#define IMX94_CLK_SEL_A55P			179
> +#define IMX94_CLK_SEL_DRAM			180
> +#define IMX94_CLK_SEL_TEMPSENSE			181
> +#define IMX94_CLK_NPU_CGC			182
> +
> +#endif /* __CLOCK_IMX94_H */
> diff --git a/arch/arm64/boot/dts/freescale/imx94-pinfunc.h b/arch/arm64/boot/dts/freescale/imx94-pinfunc.h
> new file mode 100644
> index 000000000000..00255db89185
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx94-pinfunc.h
> @@ -0,0 +1,1570 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
> +/*
> + * Copyright 2024-2025 NXP
> + */
> +
> +#ifndef __DTS_IMX94_PINFUNC_H
> +#define __DTS_IMX94_PINFUNC_H

<snip>

> +#endif /* __DTS_IMX94_PINFUNC_H */
> diff --git a/arch/arm64/boot/dts/freescale/imx94-power.h b/arch/arm64/boot/dts/freescale/imx94-power.h
> new file mode 100644
> index 000000000000..282167494a1d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx94-power.h
> @@ -0,0 +1,41 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + *  Copyright 2024-2025 NXP
> + */
> +
> +#ifndef __IMX94_POWER_H__
> +#define __IMX94_POWER_H__

Other headers in this patch use pattern of __XXX_YYY_H.  Can we get them
all aligned?

Shawn

RE: [PATCH v6 2/3] arm64: dts: freescale: Add basic dtsi for imx943

[Peng Fan]

Hi Shawn,

> Subject: Re: [PATCH v6 2/3] arm64: dts: freescale: Add basic dtsi for
> imx943
> 
> On Mon, Apr 21, 2025 at 02:51:38PM +0800, Jacky Bai wrote:
> > Add the minimal dtsi support for i.MX943. i.MX943 is the first SoC of
> > i.MX94 Family, create a common dtsi for the whole i.MX94 family,
> and
> > the specific dtsi part for i.MX943.
> >
> > The clock, power domain and perf index need to be used by the
> device
> > nodes for resource reference, add them along with the dtsi support.
> >
> > Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> > ---
> >  - v6 changes:
> >   - refine the indentation of edma irq property.
> >
> >  - v5 changes:
> >   - remove the err irq of edma node as the err irq support in driver is
> not
> >     ready. We can add it back when the driver is ready. No impact for
> current
> >     edma support.
> >
> >  - v4 changes:
> >   - reorder the cpu node compatible string property as suggested by
> > Frank
> >
> >  - v3 changes:
> >   - remove the blank line
> >   - add PAD config macro define as suggested by Frank Li
> >   - update the device nodes compatible strings for imx94 as suggested
> > by Krzysztof
> >
> >  - v2 changes:
> >   - remove the unnecessary macro define in clock header as suggested
> by Krzysztof
> >   - split the dtsi into imx94.dtsi and imx943.dtsi
> >   - use low case in the pinfunc header as Frank suggested
> >   - reorder the device nodes and properties
> > ---
> >  arch/arm64/boot/dts/freescale/imx94-clock.h   |  195 ++
> 
> I forgot to ask when imx95-clock.h was first introduced.  But how will
> clk drivers use these clock IDs, or will clk drivers have their own copy of
> definitions?

We are using SCMI for i.MX95/i.MX94. Per DT maintainers,
the IDs should not be in dt-bindings, they are SCMI firmware
defined IDs.

clk drivers is drivers/clk/clk-scmi.c, this is a SCMI generic
clk driver, it will talk with SCMI firmware to get IDs.

> 
> >  arch/arm64/boot/dts/freescale/imx94-pinfunc.h | 1570
> +++++++++++++++++
> >  arch/arm64/boot/dts/freescale/imx94-power.h   |   41 +
> 
> Same question on the power IDs.

Same as CLK IDs.

Regards,
Peng
> 

Re: [PATCH v6 2/3] arm64: dts: freescale: Add basic dtsi for imx943

[Shawn Guo]

On Fri, May 09, 2025 at 10:35:40AM +0000, Peng Fan wrote:
> > I forgot to ask when imx95-clock.h was first introduced.  But how will
> > clk drivers use these clock IDs, or will clk drivers have their own copy of
> > definitions?
> 
> We are using SCMI for i.MX95/i.MX94. Per DT maintainers,
> the IDs should not be in dt-bindings, they are SCMI firmware
> defined IDs.
> 
> clk drivers is drivers/clk/clk-scmi.c, this is a SCMI generic
> clk driver, it will talk with SCMI firmware to get IDs.

Ah, nice!  Thanks for the information, Peng!

Shawn

Re: [PATCH v6 0/3] Add i.MX943 basic dts support

[Shawn Guo]

On Mon, Apr 21, 2025 at 02:51:36PM +0800, Jacky Bai wrote:
> Jacky Bai (3):
>   dt-bindings: arm: fsl: add i.MX943 EVK board
>   arm64: dts: freescale: Add basic dtsi for imx943
>   arm64: dts: freescale: Add minimal dts support for imx943 evk

I fixed the trivial things on the second patch, and applied the series,
thanks!

Shawn