* [PATCH v3 1/2] arm64: dts: rockchip: Add GMAC nodes for RK3528
2025-05-09 20:23 [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C Jonas Karlman
@ 2025-05-09 20:23 ` Jonas Karlman
2025-05-09 20:23 ` [PATCH v3 2/2] arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C Jonas Karlman
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Jonas Karlman @ 2025-05-09 20:23 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, linux-rockchip, devicetree, linux-arm-kernel,
linux-kernel, Jonas Karlman
Rockchip RK3528 has two Ethernet controllers based on Synopsys DWC
Ethernet QoS IP.
Add device tree nodes for the two Ethernet controllers in RK3528.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- No change
Changes in v2:
- Add ethernet-phy@2 for the integrated PHY
I have no board that expose an Ethernet port for the gmac0 and the
integrated PHY. However, the PHY can be identified on addr 0x2 as
0044.1400 and in vendor kernel this relate to the Rockchip RK630 PHY.
A proper PHY driver will be needed to support real use of gmac0.
---
arch/arm64/boot/dts/rockchip/rk3528.dtsi | 105 +++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 193b84b5e912..cd8ef389ccf3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -677,6 +677,111 @@ saradc: adc@ffae0000 {
status = "disabled";
};
+ gmac0: ethernet@ffbd0000 {
+ compatible = "rockchip,rk3528-gmac", "snps,dwmac-4.20a";
+ reg = <0x0 0xffbd0000 0x0 0x10000>;
+ clocks = <&cru CLK_GMAC0_SRC>, <&cru CLK_GMAC0_RMII_50M>,
+ <&cru CLK_GMAC0_RX>, <&cru CLK_GMAC0_TX>,
+ <&cru PCLK_MAC_VO>, <&cru ACLK_MAC_VO>;
+ clock-names = "stmmaceth", "clk_mac_ref",
+ "mac_clk_rx", "mac_clk_tx",
+ "pclk_mac", "aclk_mac";
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq", "eth_wake_irq";
+ phy-handle = <&rmii0_phy>;
+ phy-mode = "rmii";
+ resets = <&cru SRST_A_MAC_VO>;
+ reset-names = "stmmaceth";
+ rockchip,grf = <&vo_grf>;
+ snps,axi-config = <&gmac0_stmmac_axi_setup>;
+ snps,mixed-burst;
+ snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
+ snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
+ snps,tso;
+ status = "disabled";
+
+ mdio0: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ rmii0_phy: ethernet-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x2>;
+ clocks = <&cru CLK_MACPHY>;
+ phy-is-integrated;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fephym0_led_link>,
+ <&fephym0_led_spd>;
+ resets = <&cru SRST_MACPHY>;
+ };
+ };
+
+ gmac0_stmmac_axi_setup: stmmac-axi-config {
+ snps,blen = <0 0 0 0 16 8 4>;
+ snps,rd_osr_lmt = <8>;
+ snps,wr_osr_lmt = <4>;
+ };
+
+ gmac0_mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ queue0 {};
+ };
+
+ gmac0_mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <1>;
+ queue0 {};
+ };
+ };
+
+ gmac1: ethernet@ffbe0000 {
+ compatible = "rockchip,rk3528-gmac", "snps,dwmac-4.20a";
+ reg = <0x0 0xffbe0000 0x0 0x10000>;
+ clocks = <&cru CLK_GMAC1_SRC_VPU>,
+ <&cru CLK_GMAC1_RMII_VPU>,
+ <&cru PCLK_MAC_VPU>,
+ <&cru ACLK_MAC_VPU>;
+ clock-names = "stmmaceth",
+ "clk_mac_ref",
+ "pclk_mac",
+ "aclk_mac";
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq", "eth_wake_irq";
+ resets = <&cru SRST_A_MAC>;
+ reset-names = "stmmaceth";
+ rockchip,grf = <&vpu_grf>;
+ snps,axi-config = <&gmac1_stmmac_axi_setup>;
+ snps,mixed-burst;
+ snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
+ snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
+ snps,tso;
+ status = "disabled";
+
+ mdio1: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ };
+
+ gmac1_stmmac_axi_setup: stmmac-axi-config {
+ snps,blen = <0 0 0 0 16 8 4>;
+ snps,rd_osr_lmt = <8>;
+ snps,wr_osr_lmt = <4>;
+ };
+
+ gmac1_mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ queue0 {};
+ };
+
+ gmac1_mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <1>;
+ queue0 {};
+ };
+ };
+
sdhci: mmc@ffbf0000 {
compatible = "rockchip,rk3528-dwcmshc",
"rockchip,rk3588-dwcmshc";
--
2.49.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 2/2] arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
2025-05-09 20:23 [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C Jonas Karlman
2025-05-09 20:23 ` [PATCH v3 1/2] arm64: dts: rockchip: Add GMAC nodes for RK3528 Jonas Karlman
@ 2025-05-09 20:23 ` Jonas Karlman
2025-05-09 21:40 ` [PATCH v3 0/2] " Heiko Stübner
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Jonas Karlman @ 2025-05-09 20:23 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, linux-rockchip, devicetree, linux-arm-kernel,
linux-kernel, Jonas Karlman
The Radxa E20C has two GbE ports, LAN and WAN. The LAN port is provided
using a GMAC controller and a YT8531C PHY and the WAN port is provided
by an RTL8111H PCIe Ethernet controller.
Enable support for the LAN port on Radxa E20C.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- Rebase on top of latest mmind/for-next
Changes in v2:
- Rebase on top of the "Support I2C controllers in RK3528" series [1]
[1] https://lore.kernel.org/r/20250309070603.35254-1-ziyao@disroot.org
---
.../boot/dts/rockchip/rk3528-radxa-e20c.dts | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
index d45b6594b2de..506d54337ece 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
@@ -17,6 +17,7 @@ / {
compatible = "radxa,e20c", "rockchip,rk3528";
aliases {
+ ethernet0 = &gmac1;
mmc0 = &sdhci;
mmc1 = &sdmmc;
};
@@ -184,6 +185,17 @@ &cpu3 {
cpu-supply = <&vdd_arm>;
};
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+ status = "okay";
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1m0_xfer>;
@@ -198,7 +210,25 @@ eeprom@50 {
};
};
+&mdio1 {
+ rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_rstn_l>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
&pinctrl {
+ ethernet {
+ gmac1_rstn_l: gmac1-rstn-l {
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
gpio-keys {
user_key: user-key {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
--
2.49.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C
2025-05-09 20:23 [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C Jonas Karlman
2025-05-09 20:23 ` [PATCH v3 1/2] arm64: dts: rockchip: Add GMAC nodes for RK3528 Jonas Karlman
2025-05-09 20:23 ` [PATCH v3 2/2] arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C Jonas Karlman
@ 2025-05-09 21:40 ` Heiko Stübner
2025-05-09 21:50 ` Jonas Karlman
2025-05-10 8:02 ` Yao Zi
2025-05-10 16:13 ` Heiko Stuebner
4 siblings, 1 reply; 7+ messages in thread
From: Heiko Stübner @ 2025-05-09 21:40 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jonas Karlman
Cc: Yao Zi, Chukun Pan, linux-rockchip, devicetree, linux-arm-kernel,
linux-kernel, Jonas Karlman
Am Freitag, 9. Mai 2025, 22:23:56 Mitteleuropäische Sommerzeit schrieb Jonas Karlman:
> The Rockchip RK3528 has two Ethernet controllers, one 100/10 MAC to be
> used with the integrated PHY and a second 1000/100/10 MAC to be used
> with an external Ethernet PHY.
>
> This series add device tree nodes for the Ethernet controllers found in
> RK3528 and enable the LAN interface on Radxa E20C.
>
> This include a gmac0 node for the 100/10 MAC and its related integrated
> PHY node that only have recived limited testing. I have no board that
> expose an Ethernet port for the gmac0 and the integrated PHY. However,
> the PHY can be identified on addr 0x2 as 0044.1400 and in vendor kernel
> this relate to the Rockchip RK630 PHY. A proper PHY driver will be
> needed to support any real use of gmac0.
>
> Changes in v3:
> - Rebase on top of latest mmind/for-next
>
> Changes in v2:
> - Split from the "Add GMAC support for RK3528" driver series [1]
split from ... was that series merged already?
The linked lore-thread only talks about the series needing to be reposted.
Heiko
> - Add ethernet-phy@2 for the integrated PHY
> - Rebase on top of the "Support I2C controllers in RK3528" series [2]
>
> [1] https://lore.kernel.org/r/20250309232622.1498084-1-jonas@kwiboo.se
> [2] https://lore.kernel.org/r/20250309070603.35254-1-ziyao@disroot.org
>
> Jonas Karlman (2):
> arm64: dts: rockchip: Add GMAC nodes for RK3528
> arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
>
> .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 30 +++++
> arch/arm64/boot/dts/rockchip/rk3528.dtsi | 105 ++++++++++++++++++
> 2 files changed, 135 insertions(+)
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C
2025-05-09 21:40 ` [PATCH v3 0/2] " Heiko Stübner
@ 2025-05-09 21:50 ` Jonas Karlman
0 siblings, 0 replies; 7+ messages in thread
From: Jonas Karlman @ 2025-05-09 21:50 UTC (permalink / raw)
To: Heiko Stübner
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yao Zi,
Chukun Pan, linux-rockchip, devicetree, linux-arm-kernel,
linux-kernel
Hi Heiko,
On 2025-05-09 23:40, Heiko Stübner wrote:
> Am Freitag, 9. Mai 2025, 22:23:56 Mitteleuropäische Sommerzeit schrieb Jonas Karlman:
>> The Rockchip RK3528 has two Ethernet controllers, one 100/10 MAC to be
>> used with the integrated PHY and a second 1000/100/10 MAC to be used
>> with an external Ethernet PHY.
>>
>> This series add device tree nodes for the Ethernet controllers found in
>> RK3528 and enable the LAN interface on Radxa E20C.
>>
>> This include a gmac0 node for the 100/10 MAC and its related integrated
>> PHY node that only have recived limited testing. I have no board that
>> expose an Ethernet port for the gmac0 and the integrated PHY. However,
>> the PHY can be identified on addr 0x2 as 0044.1400 and in vendor kernel
>> this relate to the Rockchip RK630 PHY. A proper PHY driver will be
>> needed to support any real use of gmac0.
>>
>> Changes in v3:
>> - Rebase on top of latest mmind/for-next
>>
>> Changes in v2:
>> - Split from the "Add GMAC support for RK3528" driver series [1]
>
> split from ... was that series merged already?
Yes, sorry for not being more clear, the dt-bindings and driver has been
merged and is already included in v6.15-rc1.
https://lore.kernel.org/r/174291544076.609648.8594782943472190694.git-patchwork-notify@kernel.org
Regards,
Jonas
>
> The linked lore-thread only talks about the series needing to be reposted.
>
>
> Heiko
>
>> - Add ethernet-phy@2 for the integrated PHY
>> - Rebase on top of the "Support I2C controllers in RK3528" series [2]
>>
>> [1] https://lore.kernel.org/r/20250309232622.1498084-1-jonas@kwiboo.se
>> [2] https://lore.kernel.org/r/20250309070603.35254-1-ziyao@disroot.org
>>
>> Jonas Karlman (2):
>> arm64: dts: rockchip: Add GMAC nodes for RK3528
>> arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
>>
>> .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 30 +++++
>> arch/arm64/boot/dts/rockchip/rk3528.dtsi | 105 ++++++++++++++++++
>> 2 files changed, 135 insertions(+)
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C
2025-05-09 20:23 [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C Jonas Karlman
` (2 preceding siblings ...)
2025-05-09 21:40 ` [PATCH v3 0/2] " Heiko Stübner
@ 2025-05-10 8:02 ` Yao Zi
2025-05-10 16:13 ` Heiko Stuebner
4 siblings, 0 replies; 7+ messages in thread
From: Yao Zi @ 2025-05-10 8:02 UTC (permalink / raw)
To: Jonas Karlman, Heiko Stuebner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Chukun Pan, linux-rockchip, devicetree, linux-arm-kernel,
linux-kernel
On Fri, May 09, 2025 at 08:23:56PM +0000, Jonas Karlman wrote:
> The Rockchip RK3528 has two Ethernet controllers, one 100/10 MAC to be
> used with the integrated PHY and a second 1000/100/10 MAC to be used
> with an external Ethernet PHY.
>
> This series add device tree nodes for the Ethernet controllers found in
> RK3528 and enable the LAN interface on Radxa E20C.
>
> This include a gmac0 node for the 100/10 MAC and its related integrated
> PHY node that only have recived limited testing. I have no board that
> expose an Ethernet port for the gmac0 and the integrated PHY. However,
> the PHY can be identified on addr 0x2 as 0044.1400 and in vendor kernel
> this relate to the Rockchip RK630 PHY. A proper PHY driver will be
> needed to support any real use of gmac0.
>
> Changes in v3:
> - Rebase on top of latest mmind/for-next
>
> Changes in v2:
> - Split from the "Add GMAC support for RK3528" driver series [1]
> - Add ethernet-phy@2 for the integrated PHY
> - Rebase on top of the "Support I2C controllers in RK3528" series [2]
>
> [1] https://lore.kernel.org/r/20250309232622.1498084-1-jonas@kwiboo.se
> [2] https://lore.kernel.org/r/20250309070603.35254-1-ziyao@disroot.org
>
> Jonas Karlman (2):
> arm64: dts: rockchip: Add GMAC nodes for RK3528
> arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
>
> .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 30 +++++
> arch/arm64/boot/dts/rockchip/rk3528.dtsi | 105 ++++++++++++++++++
> 2 files changed, 135 insertions(+)
On my Radxa E20C board, iperf3 shows the interface could run at roughly
1Gbps with this series,
# iperf3 -c 192.168.114.51
Connecting to host 192.168.114.51, port 5201
[ 5] local 192.168.114.50 port 41894 connected to 192.168.114.51 port 5201
[ ID] Interval Transfer Bitrate Retr Cwnd
[ 5] 0.00-1.00 sec 113 MBytes 948 Mbits/sec 0 380 KByes
[ 5] 1.00-2.00 sec 112 MBytes 944 Mbits/sec 0 399 KBytes
[ 5] 2.00-3.00 sec 112 MBytes 940 Mbits/sec 0 399 KBytes
[ 5] 3.00-4.00 sec 112 MBytes 942 Mbits/sec 0 399 KBytes
[ 5] 4.00-5.00 sec 112 MBytes 944 Mbits/sec 0 399 KBytes
[ 5] 5.00-6.00 sec 112 MBytes 940 Mbits/sec 0 399 KBytes
[ 5] 6.00-7.00 sec 112 MBytes 940 Mbits/sec 0 399 KBytes
[ 5] 7.00-8.00 sec 112 MBytes 944 Mbits/sec 0 399 KBytes
[ 5] 8.00-9.00 sec 112 MBytes 941 Mbits/sec 0 399 KBytes
[ 5] 9.00-10.00 sec 112 MBytes 941 Mbits/sec 0 399 KBytes
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bitrate Retr
[ 5] 0.00-10.00 sec 1.10 GBytes 942 Mbits/sec 0 sender
[ 5] 0.00-10.00 sec 1.10 GBytes 941 Mbits/sec receiver
iperf Done.
Tested-by: Yao Zi <ziyao@disroot.org>
Thanks for your work!
> --
> 2.49.0
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C
2025-05-09 20:23 [PATCH v3 0/2] rockchip: Enable Ethernet controller on Radxa E20C Jonas Karlman
` (3 preceding siblings ...)
2025-05-10 8:02 ` Yao Zi
@ 2025-05-10 16:13 ` Heiko Stuebner
4 siblings, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2025-05-10 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jonas Karlman
Cc: Heiko Stuebner, Yao Zi, Chukun Pan, linux-rockchip, devicetree,
linux-arm-kernel, linux-kernel
On Fri, 09 May 2025 20:23:56 +0000, Jonas Karlman wrote:
> The Rockchip RK3528 has two Ethernet controllers, one 100/10 MAC to be
> used with the integrated PHY and a second 1000/100/10 MAC to be used
> with an external Ethernet PHY.
>
> This series add device tree nodes for the Ethernet controllers found in
> RK3528 and enable the LAN interface on Radxa E20C.
>
> [...]
Applied, thanks!
[1/2] arm64: dts: rockchip: Add GMAC nodes for RK3528
commit: 5eb28f461a1b368a57994cc3b3f2ba3154c00bb8
[2/2] arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
commit: 10b9ef4a514b25dea6eac24f25e3027866526800
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 7+ messages in thread