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Thu, 15 May 2025 20:16:33 -0700 Date: Thu, 15 May 2025 20:16:32 -0700 From: Nicolin Chen To: "Tian, Kevin" CC: "jgg@nvidia.com" , "corbet@lwn.net" , "will@kernel.org" , "bagasdotme@gmail.com" , "robin.murphy@arm.com" , "joro@8bytes.org" , "thierry.reding@gmail.com" , "vdumpa@nvidia.com" , "jonathanh@nvidia.com" , "shuah@kernel.org" , "jsnitsel@redhat.com" , "nathan@kernel.org" , "peterz@infradead.org" , "Liu, Yi L" , "mshavit@google.com" , "praan@google.com" , "zhangzekun11@huawei.com" , "iommu@lists.linux.dev" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-tegra@vger.kernel.org" , "linux-kselftest@vger.kernel.org" , "patches@lists.linux.dev" , "mochs@nvidia.com" , "alok.a.tiwari@oracle.com" , "vasant.hegde@amd.com" Subject: Re: [PATCH v4 11/23] iommufd/viommu: Add IOMMUFD_CMD_HW_QUEUE_ALLOC ioctl Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001D4:EE_|DM4PR12MB6541:EE_ X-MS-Office365-Filtering-Correlation-Id: dcd0dd86-cf8a-4ab3-bef4-08dd9428149c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|7416014|376014|82310400026; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 May 2025 03:16:42.1162 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dcd0dd86-cf8a-4ab3-bef4-08dd9428149c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D4.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6541 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250515_201649_534843_ECB869DB X-CRM114-Status: GOOD ( 28.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, May 16, 2025 at 02:49:44AM +0000, Tian, Kevin wrote: > > From: Nicolin Chen > > Sent: Friday, May 16, 2025 2:45 AM > > > > On Thu, May 15, 2025 at 06:30:27AM +0000, Tian, Kevin wrote: > > > > From: Nicolin Chen > > > > Sent: Friday, May 9, 2025 11:03 AM > > > > > > > > + > > > > +/** > > > > + * struct iommu_hw_queue_alloc - ioctl(IOMMU_HW_QUEUE_ALLOC) > > > > + * @size: sizeof(struct iommu_hw_queue_alloc) > > > > + * @flags: Must be 0 > > > > + * @viommu_id: Virtual IOMMU ID to associate the HW queue with > > > > + * @type: One of enum iommu_hw_queue_type > > > > + * @index: The logical index to the HW queue per virtual IOMMU for a > > > > multi-queue > > > > + * model > > > > > > I'm thinking of an alternative way w/o having the user to assign index > > > and allowing the driver to poke object dependency (next patch). > > > > > > Let's say the index is internally assigned by the driver. so this cmd is > > > just for allowing a hw queue and it's the driver to decide the allocation > > > policy, e.g. in ascending order. > > > > > > Introduce a new flag in viommu_ops to indicate to core that the > > > new hw queue should hold a reference to the previous hw queue. > > > > > > core maintains a last_queue field in viommu. Upon success return > > > from @hw_queue_alloc() the core increments the users refcnt of > > > last_queue, records the dependency in iommufd_hw_queue struct, > > > and update viommu->last_queue. > > > > > > Then the destroy order is naturally guaranteed. > > > > I have thought about that too. It's nice that the core can easily > > maintain the dependency for the driver. > > > > But there would still need an out_index to mark each dynamically > > allocated queue. So VMM would know where it should map the queue. > > > > For example, if VMM wants to allocate a queue at its own index=1 > > without allocating index=0 first, kernel cannot fail that as VMM > > doesn't provide the index. The only way left for kernel would be > > to output the allocated queue with index=0 and then wish VMM can > > validate it, which doesn't sound safe.. > > > > VMM's index is virtual which could be mapped to whatever queue > object created at its own disposal. > > the uAPI just requires VMM to remember a sequential list of allocated > queue objects and destroy them in reverse order of allocation, instead > of in the reverse order of virtual indexes. But that's not going to work for VCMDQ. VINTF mmaps only a single page that controls multiple queues. And all queues have to be mapped correctly between HW and VM indexes. Otherwise, it won't work if VMM maps: HW-level VINTF1 LVCMDQ0 <==> VM-level VINTF0 LVCMDQ1 HW-level VINTF1 LVCMDQ1 <==> VM-level VINTF0 LVCMDQ0 So, one way or another, kernel has to ensure the static mappings of the indexes. And I think it's safer in the way that VMM tells what index to allocate.. Thanks Nicolin