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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Subject: Re: [PATCH] net: dwmac-sun8i: Use parsed internal PHY address instead of 1 Message-ID: References: <20250519164936.4172658-1-paulk@sys-base.io> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250519164936.4172658-1-paulk@sys-base.io> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250520_011129_363589_27165A05 X-CRM114-Status: GOOD ( 22.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Le Mon, May 19, 2025 at 06:49:36PM +0200, Paul Kocialkowski a écrit : > While the MDIO address of the internal PHY on Allwinner sun8i chips is > generally 1, of_mdio_parse_addr is used to cleanly parse the address > from the device-tree instead of hardcoding it. > > A commit reworking the code ditched the parsed value and hardcoded the > value 1 instead, which didn't really break anything but is more fragile > and not future-proof. > > Restore the initial behavior using the parsed address returned from the > helper. > > Fixes: 634db83b8265 ("net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs") > Signed-off-by: Paul Kocialkowski > --- > drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > index 85723a78793a..6c7e8655a7eb 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c > @@ -964,7 +964,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev, > /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY > * address. No need to mask it again. > */ > - reg |= 1 << H3_EPHY_ADDR_SHIFT; > + reg |= ret << H3_EPHY_ADDR_SHIFT; > } else { > /* For SoCs without internal PHY the PHY selection bit should be > * set to 0 (external PHY). > -- > 2.49.0 > Acked-by: Corentin LABBE Tested-by: Corentin LABBE Tested-on: sun50i-h6-orangepi-one-plus Tested-on: sun8i-h3-orangepi-pc Thanks Regards