Re: [boot-wrapper PATCH V2] aarch64: Enable access into FEAT_SPE_FDS register from EL2 and below

[Mark Rutland <mark.rutland@arm.com>]

On Fri, Jun 06, 2025 at 09:49:07AM +0100, James Clark wrote:
> On 06/06/2025 6:26 am, Anshuman Khandual wrote:
> > FEAT_SPE_FDS adds system register PMSDSFR_EL1. But accessing that system
> > register from EL2 and below exception levels, will trap into EL3 unless
> > MDCR_EL3.EnPMS3 is set.
> > 
> > Enable access to FEAT_SPE_FDS registers when they are implemented.
> > 
> > Cc: James Clark <james.clark@linaro.org>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>

> > +	/*
> > +	 * PMSIDR_EL1 register is present, only when FEAT_SPE
> > +	 * feature is implemeneted. Otherwise direct accesses
> > +	 * to PMSIDR_EL1 are UNDEFINED.
> > +	 */
> > +	if ((mrs_field(ID_AA64DFR0_EL1, PMSVER) >= 1) &&
> > +	    (mrs_field(PMSIDR_EL1, FDS)))
> 
> Minor nit, but the extra brackets on the second condition are unnecessary.
> Probably not worth a second version for though.

I don't think they're necessary for either condition, so when I apply
this I'll simplify this to:

	if (mrs_field(ID_AA64DFR0_EL1, PMSVER) >= 1 && 
	    mrs_field(PMSIDR_EL1, FDS))

... and drop the comment.

Mark.