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From: Geraldo Nascimento <geraldogabriel@gmail.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-rockchip@lists.infradead.org,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	linux-phy@lists.infradead.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v2 1/4] PCI: pcie-rockchip: add Link Control and Status Register 2
Date: Wed, 11 Jun 2025 21:48:31 -0300	[thread overview]
Message-ID: <aEoj385BMtLvNuKL@geday> (raw)
In-Reply-To: <20250611194259.GA825364@bhelgaas>

On Wed, Jun 11, 2025 at 02:42:59PM -0500, Bjorn Helgaas wrote:
> On Tue, Jun 10, 2025 at 06:19:49PM -0300, Geraldo Nascimento wrote:
> > +#define PCIE_RC_CONFIG_DCR		(PCIE_RC_CONFIG_CR + PCI_EXP_DEVCAP)
> 
> I would really like to see PCI_EXP_DEVCAP referenced in the source
> where we currently use PCIE_RC_CONFIG_DCR.  That way, cscope/tags/grep
> will find the actual uses of PCI_EXP_DEVCAP, not just this #define of
> PCIE_RC_CONFIG_DCR.
> 
> Something like this:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pci-mvebu.c?id=v6.15#n265
>

Hi Bjorn,

Yes, thank you for the code snippet, it makes things more clear.

> >  #define   PCIE_RC_CONFIG_DCR_CSPL_SHIFT		18
> >  #define   PCIE_RC_CONFIG_DCR_CSPL_LIMIT		0xff
> >  #define   PCIE_RC_CONFIG_DCR_CPLS_SHIFT		26
> 
> Also use PCI_EXP_DEVCAP_PWR_VAL and PCI_EXP_DEVCAP_PWR_SCL here if
> possible.  And FIELD_GET()/FIELD_PREP(), which avoid the need to
> define _SHIFT values.
> 
> I would do a pure conversion patch of the existing #defines.  Then I
> suspect you wouldn't need a patch to add the Link 2 registers at all
> because you could just use the #defines from pci_regs.h.
>

Got it!

Thanks!
Geraldo Nascimento


  reply	other threads:[~2025-06-12  2:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-10 21:19 [RFC PATCH v2 0/4] Quality Improvements for Rockchip-IP PCIe Geraldo Nascimento
2025-06-10 21:19 ` [RFC PATCH v2 1/4] PCI: pcie-rockchip: add Link Control and Status Register 2 Geraldo Nascimento
2025-06-11 19:42   ` Bjorn Helgaas
2025-06-12  0:48     ` Geraldo Nascimento [this message]
2025-06-12 20:49     ` Geraldo Nascimento
2025-06-12 21:26       ` Bjorn Helgaas
2025-06-10 21:20 ` [RFC PATCH v2 2/4] PCI: rockchip-host: Set Target Link Speed before retraining Geraldo Nascimento
2025-06-10 21:20 ` [RFC PATCH v2 3/4] phy: rockchip-pcie: enable all four lanes Geraldo Nascimento
2025-06-10 21:25 ` [RFC PATCH v2 4/4] phy: rockchip-pcie: adjust read mask and write strobe disable Geraldo Nascimento

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