From: Geraldo Nascimento <geraldogabriel@gmail.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-rockchip@lists.infradead.org,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
linux-phy@lists.infradead.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [RESEND RFC PATCH v4 3/5] PCI: rockchip: Set Target Link Speed before retraining
Date: Fri, 13 Jun 2025 17:27:33 -0300 [thread overview]
Message-ID: <aEyJtdhuofaUU-xL@geday> (raw)
In-Reply-To: <20250613201543.GA974034@bhelgaas>
On Fri, Jun 13, 2025 at 03:15:43PM -0500, Bjorn Helgaas wrote:
> On Fri, Jun 13, 2025 at 12:06:00PM -0300, Geraldo Nascimento wrote:
> > Current code may fail Gen2 retraining if Target Link Speed
> > is set to 2.5 GT/s in Link Control and Status Register 2.
> > Set it to 5.0 GT/s accordingly.
>
> Nit: I don't know what "Gen2" means (and the spec warns against
> assuming spec rev maps one-to-one to a speed), so try to use the
> actual speed instead of "GenX".
Ah, excellent catch. I'll make sure to adjust the commit message!
Geraldo Nascimento
>
> Bjorn
next prev parent reply other threads:[~2025-06-13 20:31 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 15:05 [RESEND RFC PATCH v4 0/5] PCI: rockchip: Improve driver quality Geraldo Nascimento
2025-06-13 15:05 ` [RESEND RFC PATCH v4 1/5] PCI: rockchip: Use standard PCIe defines Geraldo Nascimento
2025-06-13 20:14 ` Bjorn Helgaas
2025-06-13 20:26 ` Geraldo Nascimento
2025-06-13 20:50 ` Bjorn Helgaas
2025-06-13 21:01 ` Geraldo Nascimento
2025-06-14 2:31 ` Geraldo Nascimento
2025-06-14 1:38 ` Geraldo Nascimento
2025-06-13 15:05 ` [RESEND RFC PATCH v4 2/5] PCI: rockchip: Drop unused custom registers and bitfields Geraldo Nascimento
2025-06-13 15:06 ` [RESEND RFC PATCH v4 3/5] PCI: rockchip: Set Target Link Speed before retraining Geraldo Nascimento
2025-06-13 20:15 ` Bjorn Helgaas
2025-06-13 20:27 ` Geraldo Nascimento [this message]
2025-06-13 15:06 ` [RESEND RFC PATCH v4 4/5] phy: rockchip-pcie: Enable all four lanes Geraldo Nascimento
2025-06-13 15:06 ` [RESEND RFC PATCH v4 5/5] phy: rockchip-pcie: Adjust read mask and write Geraldo Nascimento
2025-06-13 20:20 ` Bjorn Helgaas
2025-06-13 20:32 ` Geraldo Nascimento
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