Re: [PATCH] dt-bindings: mfd: fsl,imx8qxp-csr: Remove binding documentation

[Frank Li <Frank.li@nxp.com>]

On Wed, Jun 18, 2025 at 05:13:14PM +0800, Liu Ying wrote:
> commit b0a5cde57cf1 ("dt-bindings: mfd: Explain lack of child dependency
> in simple-mfd") pointed out that it's a mistake for a child device f
> a simple MFD device to depend on the simple MFD device's clock resources.
> fsl,imx8qxp-csr.yaml happens to make that mistake.  To fix that, remove
> fsl,imx8qxp-csr.yaml and use "simple-pm-bus" and "syscon" as compatible
> strings in the examples of fsl,imx8qxp-pixel-link-msi-bus.yaml.

Does anyone use fsl,imx8qxp-mipi-lvds-csr/fsl,imx8qm-lvds-csr? I suppose
yes. It'd better said no one use these in dts and safe to remove.

Frank
>
> Fixes: 9b2c55b5403f ("dt-bindings: mfd: Add i.MX8qm/qxp Control and Status Registers module binding")
> Fixes: c08645ea215c ("dt-bindings: bus: Add Freescale i.MX8qxp pixel link MSI bus binding")
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
>  .../bus/fsl,imx8qxp-pixel-link-msi-bus.yaml   |   7 +-
>  .../bindings/mfd/fsl,imx8qxp-csr.yaml         | 192 ------------------
>  2 files changed, 5 insertions(+), 194 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml
>
> diff --git a/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml b/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml
> index 7e1ffc551046..4adbb7afa889 100644
> --- a/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml
> +++ b/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml
> @@ -103,11 +103,14 @@ examples:
>          clock-names = "msi", "ahb";
>          power-domains = <&pd IMX_SC_R_DC_0>;
>
> -        syscon@56221000 {
> -            compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";
> +        bus@56221000 {
> +            compatible = "simple-pm-bus", "syscon";
>              reg = <0x56221000 0x1000>;
>              clocks = <&mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4>;
>              clock-names = "ipg";
> +            #address-cells = <1>;
> +            #size-cells = <1>;
> +            ranges;
>
>              pxl2dpi {
>                  compatible = "fsl,imx8qxp-pxl2dpi";
> diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml b/Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml
> deleted file mode 100644
> index 20067002cc4a..000000000000
> --- a/Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml
> +++ /dev/null
> @@ -1,192 +0,0 @@
> -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> -%YAML 1.2
> ----
> -$id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml#
> -$schema: http://devicetree.org/meta-schemas/core.yaml#
> -
> -title: Freescale i.MX8qm/qxp Control and Status Registers Module
> -
> -maintainers:
> -  - Liu Ying <victor.liu@nxp.com>
> -
> -description: |
> -  As a system controller, the Freescale i.MX8qm/qxp Control and Status
> -  Registers(CSR) module represents a set of miscellaneous registers of a
> -  specific subsystem.  It may provide control and/or status report interfaces
> -  to a mix of standalone hardware devices within that subsystem.  One typical
> -  use-case is for some other nodes to acquire a reference to the syscon node
> -  by phandle, and the other typical use-case is that the operating system
> -  should consider all subnodes of the CSR module as separate child devices.
> -
> -properties:
> -  $nodename:
> -    pattern: "^syscon@[0-9a-f]+$"
> -
> -  compatible:
> -    items:
> -      - enum:
> -          - fsl,imx8qxp-mipi-lvds-csr
> -          - fsl,imx8qm-lvds-csr
> -      - const: syscon
> -      - const: simple-mfd
> -
> -  reg:
> -    maxItems: 1
> -
> -  clocks:
> -    maxItems: 1
> -
> -  clock-names:
> -    const: ipg
> -
> -patternProperties:
> -  "^(ldb|phy|pxl2dpi)$":
> -    type: object
> -    description: The possible child devices of the CSR module.
> -
> -required:
> -  - compatible
> -  - reg
> -  - clocks
> -  - clock-names
> -
> -allOf:
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            const: fsl,imx8qxp-mipi-lvds-csr
> -    then:
> -      required:
> -        - pxl2dpi
> -        - ldb
> -
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            const: fsl,imx8qm-lvds-csr
> -    then:
> -      required:
> -        - phy
> -        - ldb
> -
> -additionalProperties: false
> -
> -examples:
> -  - |
> -    #include <dt-bindings/clock/imx8-lpcg.h>
> -    #include <dt-bindings/firmware/imx/rsrc.h>
> -    mipi_lvds_0_csr: syscon@56221000 {
> -        compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";
> -        reg = <0x56221000 0x1000>;
> -        clocks = <&mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4>;
> -        clock-names = "ipg";
> -
> -        mipi_lvds_0_pxl2dpi: pxl2dpi {
> -            compatible = "fsl,imx8qxp-pxl2dpi";
> -            fsl,sc-resource = <IMX_SC_R_MIPI_0>;
> -            power-domains = <&pd IMX_SC_R_MIPI_0>;
> -
> -            ports {
> -                #address-cells = <1>;
> -                #size-cells = <0>;
> -
> -                port@0 {
> -                    #address-cells = <1>;
> -                    #size-cells = <0>;
> -                    reg = <0>;
> -
> -                    mipi_lvds_0_pxl2dpi_dc0_pixel_link0: endpoint@0 {
> -                        reg = <0>;
> -                        remote-endpoint = <&dc0_pixel_link0_mipi_lvds_0_pxl2dpi>;
> -                    };
> -
> -                    mipi_lvds_0_pxl2dpi_dc0_pixel_link1: endpoint@1 {
> -                        reg = <1>;
> -                        remote-endpoint = <&dc0_pixel_link1_mipi_lvds_0_pxl2dpi>;
> -                    };
> -                };
> -
> -                port@1 {
> -                    #address-cells = <1>;
> -                    #size-cells = <0>;
> -                    reg = <1>;
> -
> -                    mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {
> -                        reg = <0>;
> -                        remote-endpoint = <&mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi>;
> -                    };
> -
> -                    mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {
> -                        reg = <1>;
> -                        remote-endpoint = <&mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi>;
> -                    };
> -                };
> -            };
> -        };
> -
> -        mipi_lvds_0_ldb: ldb {
> -            #address-cells = <1>;
> -            #size-cells = <0>;
> -            compatible = "fsl,imx8qxp-ldb";
> -            clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>,
> -                     <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>;
> -            clock-names = "pixel", "bypass";
> -            power-domains = <&pd IMX_SC_R_LVDS_0>;
> -
> -            channel@0 {
> -                #address-cells = <1>;
> -                #size-cells = <0>;
> -                reg = <0>;
> -                phys = <&mipi_lvds_0_phy>;
> -                phy-names = "lvds_phy";
> -
> -                port@0 {
> -                    reg = <0>;
> -
> -                    mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {
> -                        remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>;
> -                    };
> -                };
> -
> -                port@1 {
> -                    reg = <1>;
> -
> -                    /* ... */
> -                };
> -            };
> -
> -            channel@1 {
> -                #address-cells = <1>;
> -                #size-cells = <0>;
> -                reg = <1>;
> -                phys = <&mipi_lvds_0_phy>;
> -                phy-names = "lvds_phy";
> -
> -                port@0 {
> -                    reg = <0>;
> -
> -                    mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {
> -                        remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>;
> -                    };
> -                };
> -
> -                port@1 {
> -                    reg = <1>;
> -
> -                    /* ... */
> -                };
> -            };
> -        };
> -    };
> -
> -    mipi_lvds_0_phy: phy@56228300 {
> -        compatible = "fsl,imx8qxp-mipi-dphy";
> -        reg = <0x56228300 0x100>;
> -        clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_PHY>;
> -        clock-names = "phy_ref";
> -        #phy-cells = <0>;
> -        fsl,syscon = <&mipi_lvds_0_csr>;
> -        power-domains = <&pd IMX_SC_R_MIPI_0>;
> -    };
> --
> 2.34.1
>