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Fri, 20 Jun 2025 07:39:18 -0700 (PDT) Date: Fri, 20 Jun 2025 07:39:16 -0700 In-Reply-To: <2eqjnjnszlmhlnvw6kcve4exjnpy7skguypwtmxutb2gecs3an@gcou53thsqww> Mime-Version: 1.0 References: <20250611224604.313496-2-seanjc@google.com> <20250611224604.313496-19-seanjc@google.com> <2eqjnjnszlmhlnvw6kcve4exjnpy7skguypwtmxutb2gecs3an@gcou53thsqww> Message-ID: Subject: Re: [PATCH v3 17/62] KVM: SVM: Add enable_ipiv param, never set IsRunning if disabled From: Sean Christopherson To: Naveen N Rao Cc: Marc Zyngier , Oliver Upton , Paolo Bonzini , Joerg Roedel , David Woodhouse , Lu Baolu , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Sairaj Kodilkar , Vasant Hegde , Maxim Levitsky , Joao Martins , Francesco Lavra , David Matlack Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250620_073919_753925_DCB4BF44 X-CRM114-Status: GOOD ( 16.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jun 19, 2025, Naveen N Rao wrote: > On Wed, Jun 11, 2025 at 03:45:20PM -0700, Sean Christopherson wrote: > > From: Maxim Levitsky > >=20 > > Let userspace "disable" IPI virtualization for AVIC via the enable_ipiv > > module param, by never setting IsRunning. SVM doesn't provide a way to > > disable IPI virtualization in hardware, but by ensuring CPUs never see > > IsRunning=3D1, every IPI in the guest (except for self-IPIs) will gener= ate a > > VM-Exit. >=20 > I think this is good to have regardless of the erratum. Not sure about VM= X, > but does it make sense to intercept writes to the self-ipi MSR as well? That doesn't work for AVIC, i.e. if the guest is MMIO to access the virtual= APIC. Regardless, I don't see any reason to manually intercept self-IPIs when IPI virtualization is disabled. AFAIK, there's no need to do so for correctnes= s, and Intel's self-IPI virtualization isn't tied to IPI virtualization either= . Self-IPI virtualization is enabled by virtual interrupt delivery, which in = turn is enabled by KVM when enable_apicv is true: Self-IPI virtualization occurs only if the =E2=80=9Cvirtual-interrupt del= ivery=E2=80=9D VM-execution control is 1.