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From: Frank Li <Frank.li@nxp.com>
To: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Cc: linus.walleij@linaro.org, brgl@bgdev.pl, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, chester62515@gmail.com,
	mbrugger@suse.com, Ghennadi.Procopciuc@nxp.com,
	larisa.grigore@nxp.com, lee@kernel.org, shawnguo@kernel.org,
	s.hauer@pengutronix.de, festevam@gmail.com, aisheng.dong@nxp.com,
	ping.bai@nxp.com, gregkh@linuxfoundation.org, rafael@kernel.org,
	srini@kernel.org, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, s32@nxp.com,
	clizzi@redhat.com, aruizrui@redhat.com, eballetb@redhat.com,
	echanude@redhat.com, kernel@pengutronix.de, imx@lists.linux.dev,
	vincent.guittot@linaro.org
Subject: Re: [PATCH v7 04/12] pinctrl: s32cc: small refactoring
Date: Thu, 10 Jul 2025 12:24:06 -0400	[thread overview]
Message-ID: <aG/pJjkBCq28mzMb@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20250710142038.1986052-5-andrei.stefanescu@oss.nxp.com>

On Thu, Jul 10, 2025 at 05:20:27PM +0300, Andrei Stefanescu wrote:

Subject need descript what actually you did. "small refactoring" means
nothing.

Use dev_err_probe() simplify code and fix error message/comments.

> Change dev_err&return statements into dev_err_probe throughout the driver
> on the probing path. Moreover, add/fix some comments and print
> statements.
>
> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
> ---
>  drivers/pinctrl/nxp/pinctrl-s32cc.c | 106 +++++++++++++++-------------
>  1 file changed, 55 insertions(+), 51 deletions(-)
>
> diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
> index 501eb296c760..c90cd96a9dc4 100644
> --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
> +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
> @@ -2,7 +2,7 @@
>  /*
>   * Core driver for the S32 CC (Common Chassis) pin controller
>   *
> - * Copyright 2017-2022,2024 NXP
> + * Copyright 2017-2022,2024-2025 NXP
>   * Copyright (C) 2022 SUSE LLC
>   * Copyright 2015-2016 Freescale Semiconductor, Inc.
>   */
> @@ -60,14 +60,20 @@ static u32 get_pin_func(u32 pinmux)
>  	return pinmux & GENMASK(3, 0);
>  }
>
> +/**
> + * struct s32_pinctrl_mem_region - memory region for a set of SIUL2 registers
> + * @map: regmap used for this range
> + * @pin_range: the pins controlled by these registers
> + * @name: name of the current range
> + */
>  struct s32_pinctrl_mem_region {
>  	struct regmap *map;
>  	const struct s32_pin_range *pin_range;
>  	char name[8];
>  };
>
> -/*
> - * Holds pin configuration for GPIO's.
> +/**
> + * struct gpio_pin_config - holds pin configuration for GPIO's
>   * @pin_id: Pin ID for this GPIO
>   * @config: Pin settings
>   * @list: Linked list entry for each gpio pin
> @@ -78,21 +84,23 @@ struct gpio_pin_config {
>  	struct list_head list;
>  };
>
> -/*
> - * Pad config save/restore for power suspend/resume.
> +/**
> + * struct s32_pinctrl_context - pad config save/restore for suspend/resume
> + * @pads: saved values for the pards
>   */
>  struct s32_pinctrl_context {
>  	unsigned int *pads;
>  };
>
> -/*
> +/**
> + * struct s32_pinctrl - private driver data
>   * @dev: a pointer back to containing device
>   * @pctl: a pointer to the pinctrl device structure
>   * @regions: reserved memory regions with start/end pin
>   * @info: structure containing information about the pin
> - * @gpio_configs: Saved configurations for GPIO pins
> - * @gpiop_configs_lock: lock for the `gpio_configs` list
> - * @s32_pinctrl_context: Configuration saved over system sleep
> + * @gpio_configs: saved configurations for GPIO pins
> + * @gpio_configs_lock: lock for the `gpio_configs` list
> + * @saved_context: configuration saved over system sleep
>   */
>  struct s32_pinctrl {
>  	struct device *dev;
> @@ -123,13 +131,13 @@ s32_get_region(struct pinctrl_dev *pctldev, unsigned int pin)
>  	return NULL;
>  }
>
> -static inline int s32_check_pin(struct pinctrl_dev *pctldev,
> -				unsigned int pin)
> +static int s32_check_pin(struct pinctrl_dev *pctldev,
> +			 unsigned int pin)
>  {
>  	return s32_get_region(pctldev, pin) ? 0 : -EINVAL;
>  }
>
> -static inline int s32_regmap_read(struct pinctrl_dev *pctldev,
> +static int s32_regmap_read(struct pinctrl_dev *pctldev,
>  			   unsigned int pin, unsigned int *val)
>  {
>  	struct s32_pinctrl_mem_region *region;
> @@ -145,7 +153,7 @@ static inline int s32_regmap_read(struct pinctrl_dev *pctldev,
>  	return regmap_read(region->map, offset, val);
>  }
>
> -static inline int s32_regmap_write(struct pinctrl_dev *pctldev,
> +static int s32_regmap_write(struct pinctrl_dev *pctldev,
>  			    unsigned int pin,
>  			    unsigned int val)
>  {
> @@ -163,7 +171,7 @@ static inline int s32_regmap_write(struct pinctrl_dev *pctldev,
>
>  }
>
> -static inline int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin,
> +static int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin,
>  			     unsigned int mask, unsigned int val)
>  {
>  	struct s32_pinctrl_mem_region *region;
> @@ -236,10 +244,10 @@ static int s32_dt_group_node_to_map(struct pinctrl_dev *pctldev,
>  	}
>
>  	ret = pinconf_generic_parse_dt_config(np, pctldev, &cfgs, &n_cfgs);
> -	if (ret) {
> -		dev_err(dev, "%pOF: could not parse node property\n", np);
> -		return ret;
> -	}
> +	if (ret)
> +		return dev_err_probe(dev, ret,
> +				     "%pOF: could not parse node property\n",
> +				     np);
>
>  	if (n_cfgs)
>  		reserve++;
> @@ -321,7 +329,7 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
>  	/* Check beforehand so we don't have a partial config. */
>  	for (i = 0; i < grp->data.npins; i++) {
>  		if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {
> -			dev_err(info->dev, "invalid pin: %u in group: %u\n",
> +			dev_err(info->dev, "Invalid pin: %u in group: %u\n",
>  				grp->data.pins[i], group);
>  			return -EINVAL;
>  		}
> @@ -475,8 +483,8 @@ static int s32_get_slew_regval(int arg)
>  	return -EINVAL;
>  }
>
> -static inline void s32_pin_set_pull(enum pin_config_param param,
> -				   unsigned int *mask, unsigned int *config)
> +static void s32_pin_set_pull(enum pin_config_param param,
> +			     unsigned int *mask, unsigned int *config)
>  {
>  	switch (param) {
>  	case PIN_CONFIG_BIAS_DISABLE:
> @@ -762,15 +770,15 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
>  	grp->data.name = np->name;
>
>  	npins = of_property_count_elems_of_size(np, "pinmux", sizeof(u32));
> -	if (npins < 0) {
> -		dev_err(dev, "Failed to read 'pinmux' property in node %s.\n",
> -			grp->data.name);
> -		return -EINVAL;
> -	}
> -	if (!npins) {
> -		dev_err(dev, "The group %s has no pins.\n", grp->data.name);
> -		return -EINVAL;
> -	}
> +	if (npins < 0)
> +		return dev_err_probe(dev, -EINVAL,
> +				     "Failed to read 'pinmux' in node %s\n",
> +				     grp->data.name);
> +
> +	if (!npins)
> +		return dev_err_probe(dev, -EINVAL,
> +				     "The group %s has no pins\n",
> +				     grp->data.name);
>
>  	grp->data.npins = npins;
>
> @@ -811,10 +819,9 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
>  	/* Initialise function */
>  	func->name = np->name;
>  	func->ngroups = of_get_child_count(np);
> -	if (func->ngroups == 0) {
> -		dev_err(info->dev, "no groups defined in %pOF\n", np);
> -		return -EINVAL;
> -	}
> +	if (func->ngroups == 0)
> +		return dev_err_probe(info->dev, -EINVAL,
> +				     "No groups defined in %pOF\n", np);
>
>  	groups = devm_kcalloc(info->dev, func->ngroups,
>  				    sizeof(*func->groups), GFP_KERNEL);
> @@ -885,10 +892,9 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev,
>  	}
>
>  	nfuncs = of_get_child_count(np);
> -	if (nfuncs <= 0) {
> -		dev_err(&pdev->dev, "no functions defined\n");
> -		return -EINVAL;
> -	}
> +	if (nfuncs <= 0)
> +		return dev_err_probe(&pdev->dev, -EINVAL,
> +				     "No functions defined\n");
>
>  	info->nfunctions = nfuncs;
>  	info->functions = devm_kcalloc(&pdev->dev, nfuncs,
> @@ -918,18 +924,17 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev,
>  int s32_pinctrl_probe(struct platform_device *pdev,
>  		      const struct s32_pinctrl_soc_data *soc_data)
>  {
> -	struct s32_pinctrl *ipctl;
> -	int ret;
> -	struct pinctrl_desc *s32_pinctrl_desc;
> -	struct s32_pinctrl_soc_info *info;
>  #ifdef CONFIG_PM_SLEEP
>  	struct s32_pinctrl_context *saved_context;
>  #endif
> +	struct pinctrl_desc *s32_pinctrl_desc;
> +	struct s32_pinctrl_soc_info *info;
> +	struct s32_pinctrl *ipctl;
> +	int ret;
>
> -	if (!soc_data || !soc_data->pins || !soc_data->npins) {
> -		dev_err(&pdev->dev, "wrong pinctrl info\n");
> -		return -EINVAL;
> -	}
> +	if (!soc_data || !soc_data->pins || !soc_data->npins)
> +		return dev_err_probe(&pdev->dev, -EINVAL,
> +				     "Wrong pinctrl info\n");
>
>  	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
>  	if (!info)
> @@ -964,16 +969,15 @@ int s32_pinctrl_probe(struct platform_device *pdev,
>  	s32_pinctrl_desc->owner = THIS_MODULE;
>
>  	ret = s32_pinctrl_probe_dt(pdev, ipctl);
> -	if (ret) {
> -		dev_err(&pdev->dev, "fail to probe dt properties\n");
> -		return ret;
> -	}
> +	if (ret)
> +		return dev_err_probe(&pdev->dev, ret,
> +				     "Fail to probe dt properties\n");
>
>  	ipctl->pctl = devm_pinctrl_register(&pdev->dev, s32_pinctrl_desc,
>  					    ipctl);
>  	if (IS_ERR(ipctl->pctl))
>  		return dev_err_probe(&pdev->dev, PTR_ERR(ipctl->pctl),
> -				     "could not register s32 pinctrl driver\n");
> +				     "Could not register s32 pinctrl driver\n");
>
>  #ifdef CONFIG_PM_SLEEP
>  	saved_context = &ipctl->saved_context;
> --
> 2.45.2
>


  reply	other threads:[~2025-07-10 18:37 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-10 14:20 [PATCH v7 00/12] gpio: siul2-s32g2: add initial GPIO driver Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 01/12] dt-bindings: mfd: add support for the NXP SIUL2 module Andrei Stefanescu
2025-07-10 15:49   ` Frank Li
2025-07-11  7:36   ` Krzysztof Kozlowski
2025-07-11  7:45     ` Krzysztof Kozlowski
2025-07-11  7:37   ` Krzysztof Kozlowski
2025-07-11  7:39   ` Krzysztof Kozlowski
2025-07-11 12:25     ` Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 02/12] mfd: nxp-siul2: add support for NXP SIUL2 Andrei Stefanescu
2025-07-10 16:20   ` Frank Li
2025-07-11  7:13     ` Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 03/12] arm64: dts: s32g: change pinctrl node into the new mfd node Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 04/12] pinctrl: s32cc: small refactoring Andrei Stefanescu
2025-07-10 16:24   ` Frank Li [this message]
2025-07-10 14:20 ` [PATCH v7 05/12] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Andrei Stefanescu
2025-07-10 16:24   ` Frank Li
2025-07-10 14:20 ` [PATCH v7 06/12] dt-bindings: pinctrl: deprecate SIUL2 pinctrl bindings Andrei Stefanescu
2025-07-10 16:26   ` Frank Li
2025-07-11  7:44   ` Krzysztof Kozlowski
2025-07-10 14:20 ` [PATCH v7 07/12] pinctrl: s32g2: change the driver to also be probed as an MFD cell Andrei Stefanescu
2025-07-11 10:52   ` kernel test robot
2025-07-10 14:20 ` [PATCH v7 08/12] pinctrl: s32cc: implement GPIO functionality Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 09/12] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 10/12] nvmem: s32g2_siul2: add NVMEM driver for SoC information Andrei Stefanescu
2025-07-11  5:37   ` Arnd Bergmann
2025-07-11 12:39     ` Andrei Stefanescu
2025-08-01 14:36       ` Andrei Stefanescu
2025-08-02  8:28         ` Krzysztof Kozlowski
2025-08-02  8:32           ` Krzysztof Kozlowski
2025-08-04  7:12             ` Andrei Stefanescu
2025-08-04  7:26               ` Krzysztof Kozlowski
2025-08-05 12:53                 ` Andrei Stefanescu
2025-07-18 13:45   ` Lee Jones
2025-07-10 14:20 ` [PATCH v7 11/12] MAINTAINERS: add MAINTAINER for NXP SIUL2 NVMEM cell Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 12/12] pinctrl: s32cc: set num_custom_params to 0 Andrei Stefanescu
2025-07-10 19:05 ` [PATCH v7 00/12] gpio: siul2-s32g2: add initial GPIO driver Rob Herring (Arm)

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