From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50694C8303C for ; Mon, 7 Jul 2025 16:33:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qgyZq6xZXfS2mEC+Jq4qGVw30G9mDyVHmqM7bER/BxI=; b=VG5c11GLuq4y5C+6AW/uaAAJr8 Yd2s3x4IO2gzd/QC+E71hIrf8K11hkqFm39Ox0/tIQMgwywiBENK/6gWjC6sTKMeKVE50LlJmRsig UW3YduG9DeX1Gt0Ms1D2wErJax3lp7IbCEAcYXZUjmiGF28WlShD6AOx4uucNpnhJTxrnc5HGK838 rWXkq6F9p0IXTwBBZ0BlXR24Wxtzd1Z9aNPu9OyucY5tCkk63Bg/DZVfx6eFoBtJL/VSjWvoE95MO 3gr2xu+TEguP1dGujUO5nf2cD2kEAPPeVZlFJEPyEeE1tCUX0VKVkHIQJkLZFdiHf09U5TpHL0JSV Wd0elqsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uYom6-000000031xA-3yp5; Mon, 07 Jul 2025 16:33:02 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uYoLC-00000002y2q-0Pn4 for linux-arm-kernel@lists.infradead.org; Mon, 07 Jul 2025 16:05:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8501C168F; Mon, 7 Jul 2025 09:05:00 -0700 (PDT) Received: from J2N7QTR9R3 (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 426BA3F694; Mon, 7 Jul 2025 09:05:09 -0700 (PDT) Date: Mon, 7 Jul 2025 17:05:00 +0100 From: Mark Rutland To: Colton Lewis Cc: kvm@vger.kernel.org, Paolo Bonzini , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , Mingwei Zhang , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Shuah Khan , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-perf-users@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH v3 01/22] arm64: cpufeature: Add cpucap for HPMN0 Message-ID: References: <20250626200459.1153955-1-coltonlewis@google.com> <20250626200459.1153955-2-coltonlewis@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250626200459.1153955-2-coltonlewis@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250707_090514_221614_FA404FBF X-CRM114-Status: GOOD ( 20.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jun 26, 2025 at 08:04:37PM +0000, Colton Lewis wrote: > Add a capability for FEAT_HPMN0, whether MDCR_EL2.HPMN can specify 0 > counters reserved for the guest. > > This required changing HPMN0 to an UnsignedEnum in tools/sysreg > because otherwise not all the appropriate macros are generated to add > it to arm64_cpu_capabilities_arm64_features. I agree it's appropriate to mark ID_AA64DFR0_EL1.HPMN0 as an UnsignedEnum. It follows the usual ID scheme per ARM DDI 0487 L.a section D24.1.3, and zero means not present, so it must be unsigned. Likewise, the value renames (UNPREDICTABLE => NI and DEF => IMP) look fine to me. > Signed-off-by: Colton Lewis I have one minor nit below, but either way: Acked-by: Mark Rutland > --- > arch/arm64/kernel/cpufeature.c | 8 ++++++++ > arch/arm64/tools/cpucaps | 1 + > arch/arm64/tools/sysreg | 6 +++--- > 3 files changed, 12 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index b34044e20128..73a7dac4b6f6 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -548,6 +548,7 @@ static const struct arm64_ftr_bits ftr_id_mmfr0[] = { > }; > > static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = { > + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_EL1_HPMN0_SHIFT, 4, 0), > S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_EL1_DoubleLock_SHIFT, 4, 0), > ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64DFR0_EL1_PMSVer_SHIFT, 4, 0), > ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_EL1_CTX_CMPs_SHIFT, 4, 0), > @@ -2896,6 +2897,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > .matches = has_cpuid_feature, > ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, FGT2) > }, > + { > + .desc = "FEAT_HPMN0", Minor nit, but we can drop the "FEAT_" prefix here, for consistency with other features (e.g. E0PD, FPMR). Mark. > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .capability = ARM64_HAS_HPMN0, > + .matches = has_cpuid_feature, > + ARM64_CPUID_FIELDS(ID_AA64DFR0_EL1, HPMN0, IMP) > + }, > #ifdef CONFIG_ARM64_SME > { > .desc = "Scalable Matrix Extension", > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > index 10effd4cff6b..5b196ba21629 100644 > --- a/arch/arm64/tools/cpucaps > +++ b/arch/arm64/tools/cpucaps > @@ -39,6 +39,7 @@ HAS_GIC_CPUIF_SYSREGS > HAS_GIC_PRIO_MASKING > HAS_GIC_PRIO_RELAXED_SYNC > HAS_HCR_NV1 > +HAS_HPMN0 > HAS_HCX > HAS_LDAPR > HAS_LPA2 > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > index 8a8cf6874298..d29742481754 100644 > --- a/arch/arm64/tools/sysreg > +++ b/arch/arm64/tools/sysreg > @@ -1531,9 +1531,9 @@ EndEnum > EndSysreg > > Sysreg ID_AA64DFR0_EL1 3 0 0 5 0 > -Enum 63:60 HPMN0 > - 0b0000 UNPREDICTABLE > - 0b0001 DEF > +UnsignedEnum 63:60 HPMN0 > + 0b0000 NI > + 0b0001 IMP > EndEnum > UnsignedEnum 59:56 ExtTrcBuff > 0b0000 NI > -- > 2.50.0.727.gbf7dc18ff4-goog >