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Mon, 07 Jul 2025 16:04:57 -0700 (PDT) Received: from geday ([2804:7f2:800b:a5e6::dead:c001]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4a9949fbe79sm71274421cf.31.2025.07.07.16.04.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jul 2025 16:04:56 -0700 (PDT) Date: Mon, 7 Jul 2025 20:04:45 -0300 From: Geraldo Nascimento To: Bjorn Helgaas Cc: linux-rockchip@lists.infradead.org, Shawn Lin , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Vinod Koul , Kishon Vijay Abraham I , Rick wertenbroek , Neil Armstrong , Valmantas Paliksa , linux-phy@lists.infradead.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [RESEND PATCH v9 1/4] PCI: rockchip: Use standard PCIe defines Message-ID: References: <20250707222210.GA2114615@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250707222210.GA2114615@bhelgaas> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250707_160459_290941_12CB0D3B X-CRM114-Status: GOOD ( 13.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 07, 2025 at 05:22:10PM -0500, Bjorn Helgaas wrote: > On Mon, Jun 30, 2025 at 07:24:41PM -0300, Geraldo Nascimento wrote: > > Current code uses custom-defined register offsets and bitfields for > > standard PCIe registers. Change to using standard PCIe defines. Since > > we are now using standard PCIe defines, drop unused custom-defined ones, > > which are now referenced from offset at added Capabilities Register. > > > @@ -278,10 +278,10 @@ static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip) > > power = power / 10; > > } > > > > - status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_DCR); > > - status |= (power << PCIE_RC_CONFIG_DCR_CSPL_SHIFT) | > > - (scale << PCIE_RC_CONFIG_DCR_CPLS_SHIFT); > > - rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_DCR); > > + status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_CR + PCI_EXP_DEVCAP); > > + status |= FIELD_PREP(PCI_EXP_DEVCAP_PWR_VAL, power); > > + status |= FIELD_PREP(PCI_EXP_DEVCAP_PWR_SCL, scale); > > Added #include for this: > > CC drivers/pci/controller/pcie-rockchip-host.o > drivers/pci/controller/pcie-rockchip-host.c: In function ‘rockchip_pcie_set_power_limit’: > drivers/pci/controller/pcie-rockchip-host.c:272:24: error: implicit declaration of function ‘FIELD_MAX’ [-Werror=implicit-function-declaration] > 272 | while (power > FIELD_MAX(PCI_EXP_DEVCAP_PWR_VAL)) { > | ^~~~~~~~~ > drivers/pci/controller/pcie-rockchip-host.c:282:19: error: implicit declaration of function ‘FIELD_PREP’ [-Werror=implicit-function-declaration] > 282 | status |= FIELD_PREP(PCI_EXP_DEVCAP_PWR_VAL, power); > | ^~~~~~~~~~ > Hi Bjorn, Ugh, what a miss! Thank you for taking care of this! Geraldo Nascimento