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[76.133.73.115]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23fbe30bce5sm28251825ad.27.2025.07.26.22.57.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Jul 2025 22:57:26 -0700 (PDT) Date: Sat, 26 Jul 2025 22:57:24 -0700 From: Tao Ren To: Andrew Lunn Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Tao Ren Subject: Re: [PATCH v3 10/13] ARM: dts: aspeed: Add Facebook Fuji-data64 (AST2600) Board Message-ID: References: <20250723233013.142337-1-rentao.bupt@gmail.com> <20250723233013.142337-11-rentao.bupt@gmail.com> <769d6817-ee97-4a23-b013-29bc875a00cb@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250726_225729_090606_29A5E973 X-CRM114-Status: GOOD ( 25.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 24, 2025 at 10:18:57PM -0700, Tao Ren wrote: > On Thu, Jul 24, 2025 at 02:53:39PM +0200, Andrew Lunn wrote: > > On Wed, Jul 23, 2025 at 06:03:49PM -0700, Tao Ren wrote: > > > On Thu, Jul 24, 2025 at 02:03:20AM +0200, Andrew Lunn wrote: > > > > > +&mac3 { > > > > > + status = "okay"; > > > > > + phy-mode = "rgmii"; > > > > > > > > Does the PCB have extra long clock lines to implement the 2ns delay? > > > > > > > > Andrew > > > > > > Hi Andrew, > > > > > > Thank you for catching it. I didn't notice the settings because the file > > > is copied from the exiting fuji.dts with minor changes. > > > > > > The delay is currently introduced on MAC side (by manually setting SCU > > > registers), but I guess I can update phy-mode to "rgmii-id" so the delay > > > can be handled by the PHY? > > > > That would be good, if it works. The problem with the current code is > > that those SCU registers are not set as part of the MAC driver, so it > > is hard to know what value they have. > > > > Andrew > > Hi Andrew, > > I set phy-mode to rgmii-id (letting BCM54616S handle RX/TX delay) and > cleared SCU350 (MAC3/4 RGMII delay) register, but somehow BMC is not > reachable over ethernet. > > Let me see if I missed other settings. I will drop the mac entry from v4 > if I cannot make it work by next Monday. Hi Andrew, I made it "work" by updating phy-mode to rgmii-txid, and it seems like AST2600 MAC introduces RX delay even though RXCLK delay setting is 0 in SCU350 register. As I'm not 100% sure where the RX clock delay is introduced, I will drop mac3 entry in v4. Thanks, Tao