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[34.78.140.88]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4588ee11c91sm35868305e9.4.2025.07.30.08.07.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jul 2025 08:07:17 -0700 (PDT) Date: Wed, 30 Jul 2025 15:07:14 +0000 From: Mostafa Saleh To: Jason Gunthorpe Cc: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, robin.murphy@arm.com, jean-philippe@linaro.org, qperret@google.com, tabba@google.com, mark.rutland@arm.com, praan@google.com Subject: Re: [PATCH v3 29/29] iommu/arm-smmu-v3-kvm: Add IOMMU ops Message-ID: References: <20250728175316.3706196-1-smostafa@google.com> <20250728175316.3706196-30-smostafa@google.com> <20250730144253.GM26511@ziepe.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250730144253.GM26511@ziepe.ca> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250730_080720_930949_0FF83F94 X-CRM114-Status: GOOD ( 28.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 30, 2025 at 11:42:53AM -0300, Jason Gunthorpe wrote: > On Mon, Jul 28, 2025 at 05:53:16PM +0000, Mostafa Saleh wrote: > > Register the SMMUv3 through IOMMU ops, that only support identity > > domains. This allows the driver to know which device are currently used > > to properly enable/disable then. > > > > Signed-off-by: Mostafa Saleh > > --- > > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-kvm.c | 92 ++++++++++++++++++- > > 1 file changed, 91 insertions(+), 1 deletion(-) > > Can you split the new iommu subysstem driver out please? I think I > asked this before. Sorry, maybe I misunderstood, do you mean split this patch into multiple patches or split all KVM SMMUv3 driver out of this series? > > This series is big, reviewing a new iommu driver should be done separately. > > Please review all the comments for the verisilicon driver, I think > many of the remarks apply here too: Thanks, I will go through them. > > - Domain attachment looks questionable. Please do not have > attach/detach language at all in the hypervisor facing API. I am not sure I understand this one, the hypervisor API has no attach/detach APIs? We only notify the hypervisor via “enable/disable” hypercalls when devices are attached or released (as only IDENTITY DOMAIN is supported) so it can enable or disable translation. > - Get the ordering and APIs right so replace works. You need this to support RMRs I see, we can’t support bypass for security reasons, but we can enable the identity map for such devices. > - Use a blocking domain not some unclear detatch idea There is not a single detach in this driver, we only support attach and release operation, which just goes to the hypervisor as enable/disable identity. > - Use a blocking domain for release I see, I can add “blocked_domain” similar to “arm_smmu_blocked_domain” which just disables the device translation, I will look into, I am just concerned it's more code as this driver only supports a single domain type. > - Use the smmu-v3 approach for the fwspec, don't store things in the drvdata. This is using “dev_iommu_fwspec_get” similar to the SMMUv3 driver, am I missing something? The driver only save the "struct arm_smmu_device" in drvdata, which is exactly what the other driver does (which allows us to re-use a lot of the code) Thanks, Mostafa > > Jason