Re: [PATCH 01/13] arm64: dts: imx95: Correct the lpuart7 and lpuart8 srcid

[Frank Li <Frank.li@nxp.com>]

On Fri, Aug 15, 2025 at 05:03:47PM +0800, Peng Fan wrote:
> From: Joy Zou <joy.zou@nxp.com>
>
> According to the imx95 RM, the lpuart7 rx and tx srcid is 88 and 87,

DMA's srcid

> and the lpuart8 rx and tx srcid is 90 and 89. So correct it.
>
> Fixes: 915fd2e127e8 ("arm64: dts: imx95: add edma[1..3] nodes")
> Signed-off-by: Joy Zou <joy.zou@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 4ca6a7ea586eaa5fbbaa56be8b821f7c929b7dc4..dbcc557d07f5b8a0ef27d68b7211b07d26fdb9bc 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -913,7 +913,7 @@ lpuart7: serial@42690000 {
>  				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&scmi_clk IMX95_CLK_LPUART7>;
>  				clock-names = "ipg";
> -				dmas = <&edma2 26 0 FSL_EDMA_RX>, <&edma2 25 0 0>;
> +				dmas = <&edma2 88 0 FSL_EDMA_RX>, <&edma2 87 0 0>;
>  				dma-names = "rx", "tx";
>  				status = "disabled";
>  			};
> @@ -925,7 +925,7 @@ lpuart8: serial@426a0000 {
>  				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&scmi_clk IMX95_CLK_LPUART8>;
>  				clock-names = "ipg";
> -				dmas = <&edma2 28 0 FSL_EDMA_RX>, <&edma2 27 0 0>;
> +				dmas = <&edma2 90 0 FSL_EDMA_RX>, <&edma2 89 0 0>;
>  				dma-names = "rx", "tx";
>  				status = "disabled";
>  			};
>
> --
> 2.37.1
>