From: Will Deacon <will@kernel.org>
To: Fuad Tabba <tabba@google.com>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com,
suzuki.poulose@arm.com, yuzenghui@huawei.com,
catalin.marinas@arm.com, vdonnefort@google.com,
qperret@google.com, sebastianene@google.com, keirf@google.com,
smostafa@google.com
Subject: Re: [PATCH v1 2/4] KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code
Date: Tue, 5 Aug 2025 15:38:50 +0100 [thread overview]
Message-ID: <aJIXerl04PDah1db@willie-the-truck> (raw)
In-Reply-To: <20250805135617.831971-3-tabba@google.com>
On Tue, Aug 05, 2025 at 02:56:15PM +0100, Fuad Tabba wrote:
> Allow vcpu_{read,write}_sys_reg() to be called from EL2. This makes it
> possible for hyp to use existing helper functions to access the vCPU
> context.
>
> No functional change intended.
>
> Signed-off-by: Fuad Tabba <tabba@google.com>
> ---
> arch/arm64/include/asm/kvm_emulate.h | 184 +++++++++++++++++++++++++++
> arch/arm64/include/asm/kvm_host.h | 3 -
> arch/arm64/kvm/sys_regs.c | 184 ---------------------------
> 3 files changed, 184 insertions(+), 187 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
> index 0720898f563e..1f449ef4564c 100644
> --- a/arch/arm64/include/asm/kvm_emulate.h
> +++ b/arch/arm64/include/asm/kvm_emulate.h
> @@ -224,6 +224,190 @@ static inline bool vcpu_is_host_el0(const struct kvm_vcpu *vcpu)
> return is_hyp_ctxt(vcpu) && !vcpu_is_el2(vcpu);
> }
>
> +#define PURE_EL2_SYSREG(el2) \
> + case el2: { \
> + *el1r = el2; \
> + return true; \
> + }
> +
> +#define MAPPED_EL2_SYSREG(el2, el1, fn) \
> + case el2: { \
> + *xlate = fn; \
> + *el1r = el1; \
> + return true; \
> + }
> +
> +static bool get_el2_to_el1_mapping(unsigned int reg,
> + unsigned int *el1r, u64 (**xlate)(u64))
> +{
I guess this needs to be 'inline' too, but...
> +static inline u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)
> +{
> + u64 val = 0x8badf00d8badf00d;
> + u64 (*xlate)(u64) = NULL;
> + unsigned int el1r;
> +
> + if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU))
> + goto memory_read;
> +
> + if (unlikely(get_el2_to_el1_mapping(reg, &el1r, &xlate))) {
> + if (!is_hyp_ctxt(vcpu))
> + goto memory_read;
> +
> + /*
> + * CNTHCTL_EL2 requires some special treatment to
> + * account for the bits that can be set via CNTKCTL_EL1.
> + */
> + switch (reg) {
> + case CNTHCTL_EL2:
> + if (vcpu_el2_e2h_is_set(vcpu)) {
> + val = read_sysreg_el1(SYS_CNTKCTL);
> + val &= CNTKCTL_VALID_BITS;
> + val |= __vcpu_sys_reg(vcpu, reg) & ~CNTKCTL_VALID_BITS;
> + return val;
> + }
> + break;
> + }
> +
> + /*
> + * If this register does not have an EL1 counterpart,
> + * then read the stored EL2 version.
> + */
> + if (reg == el1r)
> + goto memory_read;
> +
> + /*
> + * If we have a non-VHE guest and that the sysreg
> + * requires translation to be used at EL1, use the
> + * in-memory copy instead.
> + */
> + if (!vcpu_el2_e2h_is_set(vcpu) && xlate)
> + goto memory_read;
> +
> + /* Get the current version of the EL1 counterpart. */
> + WARN_ON(!__vcpu_read_sys_reg_from_cpu(el1r, &val));
> + if (reg >= __SANITISED_REG_START__)
> + val = kvm_vcpu_apply_reg_masks(vcpu, reg, val);
> +
> + return val;
> + }
> +
> + /* EL1 register can't be on the CPU if the guest is in vEL2. */
> + if (unlikely(is_hyp_ctxt(vcpu)))
> + goto memory_read;
> +
> + if (__vcpu_read_sys_reg_from_cpu(reg, &val))
> + return val;
> +
> +memory_read:
> + return __vcpu_sys_reg(vcpu, reg);
> +}
... isn't this now pretty huge to be inlining? Similarly for the write
accessor. What does the bloat-o-meter script say?
Will
next prev parent reply other threads:[~2025-08-05 15:47 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-05 13:56 [PATCH v1 0/4] KVM: arm64: Fixes to handling of restricted registers for protected VMs Fuad Tabba
2025-08-05 13:56 ` [PATCH v1 1/4] KVM: arm64: Handle AIDR_EL1 and REVIDR_EL1 in host " Fuad Tabba
2025-08-05 13:56 ` [PATCH v1 2/4] KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code Fuad Tabba
2025-08-05 14:38 ` Will Deacon [this message]
2025-08-05 15:51 ` Fuad Tabba
2025-08-05 13:56 ` [PATCH v1 3/4] KVM: arm64: Sync protected guest VBAR_EL1 on injecting an undef exception Fuad Tabba
2025-08-05 14:35 ` Will Deacon
2025-08-05 15:25 ` Fuad Tabba
2025-08-05 18:41 ` Marc Zyngier
2025-08-05 18:43 ` Fuad Tabba
2025-08-05 13:56 ` [PATCH v1 4/4] arm64: vgic-v2: Fix guest endianness check in hVHE mode Fuad Tabba
2025-08-05 14:39 ` [PATCH v1 0/4] KVM: arm64: Fixes to handling of restricted registers for protected VMs Will Deacon
2025-08-05 15:20 ` Fuad Tabba
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