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From: Oliver Upton To: Marc Zyngier Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Volodymyr Babchuk , Joey Gouly , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH 2/2] KVM: arm64: Fix vcpu_{read,write}_sys_reg() accessors Message-ID: References: <20250809144811.2314038-1-maz@kernel.org> <20250809144811.2314038-3-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250809144811.2314038-3-maz@kernel.org> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250812_132547_532039_11B72517 X-CRM114-Status: GOOD ( 14.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, Aug 09, 2025 at 03:48:11PM +0100, Marc Zyngier wrote: > @@ -144,125 +156,120 @@ static bool get_el2_to_el1_mapping(unsigned int reg, > MAPPED_EL2_SYSREG(ZCR_EL2, ZCR_EL1, NULL ); > MAPPED_EL2_SYSREG(CONTEXTIDR_EL2, CONTEXTIDR_EL1, NULL ); > MAPPED_EL2_SYSREG(SCTLR2_EL2, SCTLR2_EL1, NULL ); > + case CNTHCTL_EL2: > + /* CNTHCTL_EL2 is super special, until we support NV2.1 */ > + loc->loc = ((is_hyp_ctxt(vcpu) && vcpu_el2_e2h_is_set(vcpu)) ? > + SR_LOC_SPECIAL : SR_LOC_MEMORY); > + break; > + case TPIDR_EL0: > + case TPIDRRO_EL0: > + case TPIDR_EL1: > + case PAR_EL1: > + /* These registers are always loaded, no matter what */ > + loc->loc = SR_LOC_LOADED; > + break; > default: > - return false; > + /* > + * Non-mapped EL2 registers are by definition in memory, but > + * we don't need to distinguish them here, as the CPU > + * register accessors will bail out and we'll end-up using > + * the backing store. > + * > + * EL1 registers are, however, only loaded if we're > + * not in hypervisor context. > + */ > + loc->loc = is_hyp_ctxt(vcpu) ? SR_LOC_MEMORY : SR_LOC_LOADED; Hmm... I get the feeling that this flow is becoming even more subtle. There's some implicit coupling between this switch statement and the __vcpu_{read,write}_sys_reg_from_cpu() which feels like it could be error prone. Especially since we're gonna lose the WARN() that would inform us if an on-CPU register was actually redirected to memory. I'm wondering if we need some macro hell containing the block of registers we handle on-CPU and expand that can be expanded into this triage switch case as well as the sysreg accessor. What you have definitely seems correct, though. I'll twiddle a bit and see if I come up with something, although I imagine what you have is what we'll use in the end anyway. Thanks, Oliver