Re: [PATCH 1/2] arm64: dts: imx8mp: add idle cooling devices to cpu core

[Shawn Guo <shawnguo2@yeah.net>]

On Tue, Jul 15, 2025 at 05:59:22AM +0000, Martin Kepplinger wrote:
> The thermal framework can use the cpu-idle-states as
> described for imx8mp as an alternative or in parallel to
> cpufreq.
> 
> Add the DT node to the cpu so the cooling devices will be present
> and the thermal zone descriptions can use them.
> 
> Signed-off-by: Martin Kepplinger <martink@posteo.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index bb24dba7338ea..66e1a27d6eed9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -80,6 +80,11 @@ A53_0: cpu@0 {
>  			operating-points-v2 = <&a53_opp_table>;
>  			#cooling-cells = <2>;
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			cpu0_therm: thermal-idle {

Have a newline between properties and child node.

Shawn

> +				#cooling-cells = <2>;
> +				duration-us = <10000>;
> +				exit-latency-us = <700>;
> +			};
>  		};
>  
>  		A53_1: cpu@1 {
> @@ -98,6 +103,11 @@ A53_1: cpu@1 {
>  			operating-points-v2 = <&a53_opp_table>;
>  			#cooling-cells = <2>;
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			cpu1_therm: thermal-idle {
> +				#cooling-cells = <2>;
> +				duration-us = <10000>;
> +				exit-latency-us = <700>;
> +			};
>  		};
>  
>  		A53_2: cpu@2 {
> @@ -116,6 +126,11 @@ A53_2: cpu@2 {
>  			operating-points-v2 = <&a53_opp_table>;
>  			#cooling-cells = <2>;
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			cpu2_therm: thermal-idle {
> +				#cooling-cells = <2>;
> +				duration-us = <10000>;
> +				exit-latency-us = <700>;
> +			};
>  		};
>  
>  		A53_3: cpu@3 {
> @@ -134,6 +149,11 @@ A53_3: cpu@3 {
>  			operating-points-v2 = <&a53_opp_table>;
>  			#cooling-cells = <2>;
>  			cpu-idle-states = <&cpu_pd_wait>;
> +			cpu3_therm: thermal-idle {
> +				#cooling-cells = <2>;
> +				duration-us = <10000>;
> +				exit-latency-us = <700>;
> +			};
>  		};
>  
>  		A53_L2: l2-cache0 {
> -- 
> 2.39.5
>