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From: Oliver Upton To: Sascha Bischoff Cc: "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.linux.dev" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , nd , "maz@kernel.org" , Joey Gouly , Suzuki Poulose , "yuzenghui@huawei.com" , "will@kernel.org" , "tglx@linutronix.de" , "lpieralisi@kernel.org" , Timothy Hayes Subject: Re: [PATCH 0/5] KVM: arm64: GICv5 legacy (GCIE_LEGACY) NV enablement and cleanup Message-ID: References: <20250828105925.3865158-1-sascha.bischoff@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250828105925.3865158-1-sascha.bischoff@arm.com> X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250904_023434_781683_5953D524 X-CRM114-Status: GOOD ( 18.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 28, 2025 at 10:59:41AM +0000, Sascha Bischoff wrote: > Hi all, > > This series enables nested virtualization for GICv3-based VMs on GICv5 > hosts (w/ FEAT_GCIE_LEGACY) in KVM/arm64. In addition, it adds a CPU > capability to track support for FEAT_GCIE_LEGACY across all CPUs. > > The series fixes ICC_SRE_EL2 access handling for GICv5 hosts (to match > the updated bet1+ specification [1]), and extends nested > virtualization support to vGICv3 guests running on compatible GICv5 > systems. With these changes, it becomes possible to run with > kvm-arm.mode=nested, and these changes have been tested with three > levels of nesting on simulated hardware (Arm FVP). > > Previously, the presence of FEAT_GCIE_LEGACY was tracked in the GICv5 > driver via gic_kvm_info, and the probing logic could incorrectly > enable legacy support if the boot CPU exposed the feature while others > did not. This created the risk of mismatched configurations, > particularly when late-onlining CPUs without FEAT_GCIE_LEGACY. > > To address this, the series introduces a proper ARM64_HAS_GICV5_LEGACY > CPU capability, and moves KVM to use cpus_have_final_cap() to ensure > consistent system-wide enablement. With this, late-onlined but > mismatched CPUs are cleanly rejected at bring-up. > > Patch summary > > KVM: arm64: allow ICC_SRE_EL2 accesses on a GICv5 host > Update handling to reflect the corrected GICv5 specification. > > KVM: arm64: Enable nested for GICv5 host with FEAT_GCIE_LEGACY > Allow nested virtualization for vGICv3 guests on GICv5 hosts with > legacy support. > > arm64: cpucaps: Add GICv5 Legacy vCPU interface (GCIE_LEGACY) capability > Introduce a new CPU capability that prevents mismatched > configurations. > > KVM: arm64: Use ARM64_HAS_GICV5_LEGACY for GICv5 probing > Ensure probing is consistent across all CPUs by using cpucaps. > > irqchip/gic-v5: Drop has_gcie_v3_compat from gic_kvm_info > Remove obsolete compatibility flag, as FEAT_GCIE_LEGACY is now a > CPU feature. > > Comments and reviews are very welcome. > > Thanks, > Sascha > > [1] https://developer.arm.com/documentation/aes0070/latest/ > > Sascha Bischoff (5): > KVM: arm64: Allow ICC_SRE_EL2 accesses on a GICv5 host > KVM: arm64: Enable nested for GICv5 host with FEAT_GCIE_LEGACY > arm64: cpucaps: Add GICv5 Legacy vCPU interface (GCIE_LEGACY) > capability > KVM: arm64: Use ARM64_HAS_GICV5_LEGACY for GICv5 probing > irqchip/gic-v5: Drop has_gcie_v3_compat from gic_kvm_info For the series: Reviewed-by: Oliver Upton Thanks, Oliver