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From: Will Deacon <will@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Yeoreum Yun <yeoreum.yun@arm.com>,
	broonie@kernel.org, maz@kernel.org, oliver.upton@linux.dev,
	joey.gouly@arm.com, james.morse@arm.com, ardb@kernel.org,
	scott@os.amperecomputing.com, suzuki.poulose@arm.com,
	yuzenghui@huawei.com, mark.rutland@arm.com,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH RESEND v7 4/6] arm64: futex: refactor futex atomic operation
Date: Mon, 15 Sep 2025 21:35:55 +0100	[thread overview]
Message-ID: <aMh4q4-xAPHnaOul@willie-the-truck> (raw)
In-Reply-To: <aMhrscd1gz_syMtL@arm.com>

On Mon, Sep 15, 2025 at 08:40:33PM +0100, Catalin Marinas wrote:
> On Mon, Sep 15, 2025 at 11:32:39AM +0100, Yeoreum Yun wrote:
> > > On Sat, Aug 16, 2025 at 04:19:27PM +0100, Yeoreum Yun wrote:
> > > > diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h
> > > > index bc06691d2062..ab7003cb4724 100644
> > > > --- a/arch/arm64/include/asm/futex.h
> > > > +++ b/arch/arm64/include/asm/futex.h
> > > > @@ -7,17 +7,21 @@
> > > >
> > > >  #include <linux/futex.h>
> > > >  #include <linux/uaccess.h>
> > > > +#include <linux/stringify.h>
> > > >
> > > >  #include <asm/errno.h>
> > > >
> > > > -#define FUTEX_MAX_LOOPS	128 /* What's the largest number you can think of? */
> > > > +#define LLSC_MAX_LOOPS	128 /* What's the largest number you can think of? */
> > >
> > > I just noticed - you might as well leave the name as is here, especially
> > > if in patch 6 you align down address and use CAS on a 64-bit value as
> > > per Will's comment (and it's no longer LLSC). I think renaming this is
> > > unnecessary.
> > 
> > Okay. I'll restore to use origin name.
> > But I think LSUI wouldn't be used with CAS according to patch 6's
> > comments from you and additionally i think
> > chaning the CAS would make a failure because of
> > change of unrelated field. i.e)
> > 
> > struct user_structure{
> >   uint32 futex;
> >   uint32 some_value;
> > };
> > 
> > In this case, the change of some_value from user side could make a
> > failure of futex atomic operation.
> 
> Yes but the loop would read 'some_value' again, fold in 'futex' and
> retry. It would eventually succeed or fail after 128 iterations if the
> user keeps changing that location. Note that's also the case with LL/SC,
> the exclusive monitor would be cleared by some store in the same cache
> line (well, depending on the hardware implementation) and the STXR fail.
> From this perspective, CAS has better chance of succeeding.
> 
> > So I think it would be better to keep the current LLSC implementation
> > in LSUI.
> 
> I think the code would look simpler with LL/SC but you can give it a try
> and post the code sample here (not in a new series).

If you stick the cas*t instruction in its own helper say, cmpxchg_user(),
then you can do all the shifting/masking in C and I don't reckon it's
that bad. It means we (a) get rid of exclusives, which is the whole
point of this and (b) don't have to mess around with PAN.

> BTW, is there a test suite for all the futex operations? The cover
> letter did not mention any.

I was thinking that too. I'm sure I remember a 'futextest' kicking
around when we did the arm64 port but nowadays there's something in
tools/testing/selftests/futex/ which might be better.

Will


  reply	other threads:[~2025-09-15 20:36 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-16 15:19 [PATCH RESEND v7 0/6] support FEAT_LSUI and apply it on futex atomic ops Yeoreum Yun
2025-08-16 15:19 ` [PATCH RESEND v7 1/6] arm64: cpufeature: add FEAT_LSUI Yeoreum Yun
2025-09-12 16:12   ` Catalin Marinas
2025-08-16 15:19 ` [PATCH RESEND v7 2/6] KVM: arm64: expose FEAT_LSUI to guest Yeoreum Yun
2025-09-12 16:25   ` Catalin Marinas
2025-08-16 15:19 ` [PATCH RESEND v7 3/6] arm64: Kconfig: add LSUI Kconfig Yeoreum Yun
2025-09-12 16:24   ` Catalin Marinas
2025-09-15 10:42     ` Yeoreum Yun
2025-09-15 11:32       ` Will Deacon
2025-09-15 11:41         ` Yeoreum Yun
2025-08-16 15:19 ` [PATCH RESEND v7 4/6] arm64: futex: refactor futex atomic operation Yeoreum Yun
2025-09-11 15:38   ` Will Deacon
2025-09-11 16:04     ` Yeoreum Yun
2025-09-12 16:44   ` Catalin Marinas
2025-09-12 17:01     ` Catalin Marinas
2025-09-15 10:39     ` Yeoreum Yun
2025-09-12 16:53   ` Catalin Marinas
2025-09-15 10:32     ` Yeoreum Yun
2025-09-15 19:40       ` Catalin Marinas
2025-09-15 20:35         ` Will Deacon [this message]
2025-09-16  7:02           ` Catalin Marinas
2025-09-16  9:15             ` Yeoreum Yun
2025-09-16  9:24               ` Yeoreum Yun
2025-09-16 10:02             ` Yeoreum Yun
2025-09-16 10:16               ` Will Deacon
2025-09-16 12:50                 ` Yeoreum Yun
2025-09-17  9:32                   ` Yeoreum Yun
2025-09-16 12:47               ` Mark Rutland
2025-09-16 13:27                 ` Yeoreum Yun
2025-09-16 13:45                   ` Mark Rutland
2025-09-16 13:58                     ` Yeoreum Yun
2025-09-16 14:07                       ` Mark Rutland
2025-09-16 14:15                         ` Yeoreum Yun
2025-09-15 22:34         ` Yeoreum Yun
2025-09-16 12:53           ` Catalin Marinas
2025-08-16 15:19 ` [PATCH v7 RESEND 5/6] arm64: futex: small optimisation for __llsc_futex_atomic_set() Yeoreum Yun
2025-09-11 15:28   ` Will Deacon
2025-09-11 16:19     ` Yeoreum Yun
2025-09-12 16:36       ` Catalin Marinas
2025-09-15 10:41         ` Yeoreum Yun
2025-08-16 15:19 ` [PATCH RESEND v7 6/6] arm64: futex: support futex with FEAT_LSUI Yeoreum Yun
2025-09-11 15:22   ` Will Deacon
2025-09-11 16:45     ` Yeoreum Yun
2025-09-12 17:16     ` Catalin Marinas
2025-09-15  9:15       ` Yeoreum Yun
2025-09-12 17:09   ` Catalin Marinas
2025-09-15  8:24     ` Yeoreum Yun
2025-09-01 10:06 ` [PATCH RESEND v7 0/6] support FEAT_LSUI and apply it on futex atomic ops Yeoreum Yun
2025-09-11 15:09 ` Will Deacon
2025-09-11 16:22   ` Catalin Marinas
2025-09-15 20:37     ` Will Deacon

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