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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-37634aed265sm38378101fa.8.2025.10.14.07.13.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Oct 2025 07:13:20 -0700 (PDT) Date: Tue, 14 Oct 2025 16:13:18 +0200 From: Marcus Folkesson To: Wolfram Sang , Peter Rosin , Michael Hennerich , Bartosz Golaszewski , Andi Shyti Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski Subject: Re: [PATCH v2 0/5] I2C Mux per channel bus speed Message-ID: References: <20251002-i2c-mux-v2-0-b698564cd956@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="UtyZG84lIxvJbmRv" Content-Disposition: inline In-Reply-To: <20251002-i2c-mux-v2-0-b698564cd956@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251014_071323_776268_98344954 X-CRM114-Status: GOOD ( 23.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --UtyZG84lIxvJbmRv Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi all, On Thu, Oct 02, 2025 at 04:41:31PM +0200, Marcus Folkesson wrote: > This was a RFC on how to implement a feature to have different bus > speeds on different channels with an I2C multiplexer/switch. > As no major complaints on the design came up during the review, I > decided to submit the series without the RFC tag. >=20 > The benefit with this feature is that you may group devices after > the fastest bus speed they can handle. > A real-world example is that you could have e.g. a display running @400kHz > and a smart battery running @100kHz using the same I2C controller. >=20 > There are many corner cases where this may cause a problem for some > hardware topologies. I've tried to describe those I could think of > in the documentation, see Patch #5. >=20 > E.g. one risk is that if the mux driver does not disconnect channels > when Idle, this may cause a higher frequency to "leak" through to > devices that are supposed to run at lower bus speed. > This is not only a "problem" for changing bus speed but could also be > an issue for potential address conflicts. >=20 > The implementation is split up into several patches: >=20 > Patch #1 Introduce a callback for the i2c controller to set bus speed > Patch #2 Introduce functionality to adjust bus speed depending on mux > channel. > Patch #3 Cleanup i2c-davinci driver a bit to prepare it for set_clk_freq > Parch #4 Implement set_clk_freq for the i2c-davinci driver > Parch #5 Update documentation with this feature Any more comments on this series? Thanks, Marcus Folkesson --UtyZG84lIxvJbmRv Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEEBVGi6LZstU1kwSxliIBOb1ldUjIFAmjuWnkACgkQiIBOb1ld UjKh+xAAkkGlqFuabpDZx0DeOU2tT5KZTfA5XMjR9YkT64Z+9kug4zZ4NxpjjnrN 2+zg81cG9ca1QqErpq0jM5SSp+KxhZJLFElsecig905+4D+oSsDL4XyU59Krwv/s M59mcKQMKRTsr9D+J7WWoNuPa84qbG3nNusgqZRmHaS/59B5FGOtmWwnpkDbEyg5 sgBupn0y0idAIV+RDoh4YjFXZsXndEmr9lkRDHhmChL5tHC970dsq183ttJSG/tQ K0kUQ3ilst6ZnDoZ+VIdsTRX60IRzxntAL6N2cay+NNxk1J7NGX2CDZUJpllmzhJ JER+LjODXPGz86zi7yRCYRiLAQvZbCgrElk0IglfwdGpFWohh+9LD8Q5gmh8Nn9P X1eDcrR+FFzmSkBt9O4BGsuBZ6U/Op62fpccLooibFbFWuCyKjfZHxVn3MgeJveY Z9spR5F/G117fESQj+Dn8daAQCwjmMbgUtPKvPSoeh0mPoTXgk8lWx1twsAl9gzL qJ4/AHjkH0M4bjUkxC6RL3p+GbF/22jgig176Fu3WUSnfjceZK96EmuCsAslGTBC itO0Grs7yFsWBa5W/EmYKEktqUnrbRPkNkBvqt0Hq/czG88/HkJc0WucI3y0njX0 1vD6sIQ+wdRvx1C+fjVJC5wmGYOLX8VTpuVj0r0vvOQBWry3wEU= =4xG5 -----END PGP SIGNATURE----- --UtyZG84lIxvJbmRv--