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From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <will@kernel.org>, <jean-philippe@linaro.org>,
	<robin.murphy@arm.com>, <joro@8bytes.org>, <balbirs@nvidia.com>,
	<miko.lenczewski@arm.com>, <peterz@infradead.org>,
	<kevin.tian@intel.com>, <praan@google.com>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 3/7] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array
Date: Fri, 7 Nov 2025 12:23:56 -0800	[thread overview]
Message-ID: <aQ5VXORy6nQ9yfwF@Asurada-Nvidia> (raw)
In-Reply-To: <20251107194158.GB1932966@nvidia.com>

On Fri, Nov 07, 2025 at 03:41:58PM -0400, Jason Gunthorpe wrote:
> On Mon, Oct 27, 2025 at 11:54:17AM -0700, Nicolin Chen wrote:
> > +struct arm_smmu_invs *arm_smmu_invs_merge(struct arm_smmu_invs *invs,
> > +					  struct arm_smmu_invs *to_merge)
> > +{
> > +	struct arm_smmu_invs *new_invs;
> > +	struct arm_smmu_inv *new;
> > +	size_t num_trashes = 0;
> > +	size_t num_adds = 0;
> > +	size_t i, j;
> > +
> > +	for (i = j = 0; i != invs->num_invs || j != to_merge->num_invs;) {
> > +		int cmp = arm_smmu_invs_cmp(invs, i, to_merge, j);
> > +
> > +		/* Skip any unwanted trash entry */
> > +		if (cmp < 0 && !refcount_read(&invs->inv[i].users)) {
> 
> Do we need cmp < 0 here and in all these other similar ifs? Can't we
> just fully ignore trash entries no matter how they cmopare to the
> other list?
 
The index "i" might overflow in case of cmp > 1. So, if we don't
check cmp, we'd need to check "i != invs->num_invs" instead.

> If cmp ==0 and we do num_trash++ then the next iteration will see j
> ass cmp > 1 so it will do num_adds++ and the two will cancel out.

Yea, cmp == 0 should work with an additional iteration.

Perhaps we can do this:

+		int cmp;
+
+		/* Skip any trash entry */
+		if (i != invs->num_invs && !refcount_read(&invs->inv[i].users)) {
+			num_trashes++;
+			i++;
+			continue;
+		}
+
+		cmp = arm_smmu_invs_cmp(invs, i, to_merge, j);

And I will fix the other two places too.

Thanks
Nicolin


  reply	other threads:[~2025-11-07 20:24 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-27 18:54 [PATCH v4 0/7] iommu/arm-smmu-v3: Introduce an RCU-protected invalidation array Nicolin Chen
2025-10-27 18:54 ` [PATCH v4 1/7] iommu/arm-smmu-v3: Explicitly set smmu_domain->stage for SVA Nicolin Chen
2025-10-27 18:54 ` [PATCH v4 2/7] iommu/arm-smmu-v3: Add an inline arm_smmu_domain_free() Nicolin Chen
2025-10-28  9:57   ` Balbir Singh
2025-10-27 18:54 ` [PATCH v4 3/7] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array Nicolin Chen
2025-11-07 19:41   ` Jason Gunthorpe
2025-11-07 20:23     ` Nicolin Chen [this message]
2025-11-08  1:01       ` Jason Gunthorpe
2025-10-27 18:54 ` [PATCH v4 4/7] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array Nicolin Chen
2025-10-27 18:54 ` [PATCH v4 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs when attaching masters Nicolin Chen
2025-11-07 19:49   ` Jason Gunthorpe
2025-10-27 18:54 ` [PATCH v4 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range() Nicolin Chen
2025-11-08  0:50   ` Jason Gunthorpe
2025-10-27 18:54 ` [PATCH v4 7/7] iommu/arm-smmu-v3: Perform per-domain invalidations using arm_smmu_invs Nicolin Chen
2025-11-08  1:03   ` Jason Gunthorpe

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