[PATCH v3 0/8] Add support for i.MX8ULP's SIM LPAV

Laurentiu Mihalcea
2025-10-29T13:56:08Z

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

The LPAV System Integration Module (SIM) is an IP found inside i.MX8ULP's
LPAV subsystem, which offers clock gating, reset line
assertion/de-assertion, and various other misc. options.

This series adds support for the IP by introducing a new clock HW provider
driver and by modifying i.MX8MP's AUDIOMIX block control reset driver to
allow it to be used for i.MX8ULP's SIM LPAV as well.

This series is a spin-off from [1].

[1]: https://lore.kernel.org/lkml/20240922174225.75948-1-laurentiumihalcea111@gmail.com/

---
Changes in v3:

* rename "lpav_bus", "hifi_core", and "hifi_plat" to "bus", "core", "plat"
* don't assign the "name" field of "struct clk_parent_data". Previously, we
were assigning the local parent name to this field, which wouldn't have
worked anyways if, for whatever reason, the fallback mechanism would kick in.
* replace the whole auxiliary reset driver creation chunk by
a single devm_auxiliary_device_create() call.
* replace the "shift" field from "struct imx8mp_reset_map" with the usage of
ffs()
* shorten commit description for patch 6
* cast "id->driver_data" to "void *" instead of the previous
"const struct imx8mp_reset_info *", which makes the line shorter.
* open question resulting from Peng Fan's comment on V2: how to access
interconnect QoS registers? do we need to model the sim_lpav as an
interconnect provider as well or is it fine to have another interconnect
provider that references the sim_lpav node and accesses its registers
via regmap (dev_get_regmap(), specifically, NOT syscon).
* link to v2: https://lore.kernel.org/lkml/20251017112025.11997-1-laurentiumihalcea111@gmail.com/

Changes in v2:

* drop redundant description for "#clock-cells"/"#reset-cells" properties
from binding
* make "mux-controller" and "#reset-cells" properties mandatory
* add "mux-controller" child to binding example node
* drop the compatiblity with syscon - this was never actually needed and
it was done to allow using "mmio-mux", which requires a syscon parent
* modify the auxiliary reset driver to use regmap - this will allow the
mux controller, clock control and reset control APIs to use the same
spinlock.
* rename "imx8ulp-reset-sim-lpav.h" to "fsl,imx8ulp-sim-lpav.h"
* drop the "IMX8ULP_CLK_SIM_LPAV_END" macro, which doesn't belong to the
binding headers
* fix the values of "IMX8MP_AUDIOMIX_EARC_RESET_MASK" and
"IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK", which were previously incorrect
* drop redundant macros from auxiliary reset driver - replace their
occurrences with their values
* squash the binding-related macro additions into the binding patch
* add mux-controller child node to the sim_lpav node
* make the "gates" array static
* link to v1: https://lore.kernel.org/lkml/20250804155407.285353-1-laurentiumihalcea111@gmail.com/
---

Laurentiu Mihalcea (8):
reset: imx8mp-audiomix: Fix bad mask values
dt-bindings: clock: document 8ULP's SIM LPAV
clk: imx: add driver for imx8ulp's sim lpav
reset: imx8mp-audiomix: Drop unneeded macros
reset: imx8mp-audiomix: Switch to using regmap API
reset: imx8mp-audiomix: Extend the driver usage
reset: imx8mp-audiomix: Support i.MX8ULP SIM LPAV
arm64: dts: imx8ulp: add sim lpav node

.../bindings/clock/fsl,imx8ulp-sim-lpav.yaml | 72 ++++++++
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 17 ++
drivers/clk/imx/Makefile | 1 +
drivers/clk/imx/clk-imx8ulp-sim-lpav.c | 160 +++++++++++++++++
drivers/reset/reset-imx8mp-audiomix.c | 164 +++++++++++++-----
include/dt-bindings/clock/imx8ulp-clock.h | 5 +
.../dt-bindings/reset/fsl,imx8ulp-sim-lpav.h | 16 ++
7 files changed, 392 insertions(+), 43 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/fsl,imx8ulp-sim-lpav.yaml
create mode 100644 drivers/clk/imx/clk-imx8ulp-sim-lpav.c
create mode 100644 include/dt-bindings/reset/fsl,imx8ulp-sim-lpav.h

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2.43.0