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Miller" , Eric Dumazet , Furong Xu <0x1207@gmail.com>, Jacob Keller , Jakub Kicinski , "Jan Petrous (OSS)" , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Chevallier , Maxime Coquelin , netdev@vger.kernel.org, Paolo Abeni , Simon Horman , Vladimir Oltean , Yu-Chun Lin Subject: Re: [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff) Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Proofpoint-GUID: gX8dlF4pw5STOMv8dJTOObqkLsCLxOjK X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDMwMDEwOCBTYWx0ZWRfX93A7hqad+aEq lbhm0oDO54qE7sELyJxy+zODfaRQ4/7jqoHjIMrve6VT+RWidBuHPL7eHLZz8I/23A7aJ1qYI+Y Wnho91WShYtJqKjHmvnTGQXGrB7pIhgA6C0NIKJnHxsokFhYfNUNpbViHlAswnzSvb/NgWRZB93 R+QSqlkH2WhEXuAFXdZm/LUpNx6PxxiJBpoASzVflgtodtGhFDB0P8OKd0epY70GGd2oqN4p8/9 +tochhJqF9JiftSLEr/n72JhAQNUqKdUt7eItSE1MSHTnWPiidDSNEWZCyxYkzf549Nf0Z3F3mN jhRqRkHWZbC68U8jALlu7ba+NoDtp6jGCDFwTs+epwIIah3NnNgFePXuNDaso2Z13HhBByzotGq ZOop+WbAOaT/gQahSP3C+HctjAPogw== X-Proofpoint-ORIG-GUID: gX8dlF4pw5STOMv8dJTOObqkLsCLxOjK X-Authority-Analysis: v=2.4 cv=ItUTsb/g c=1 sm=1 tr=0 ts=6903663d cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=kj9zAlcOel0A:10 a=x6icFKpwvdMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=ld7dpV6llueYRqIT5ogA:9 a=CjuIK1q_8ugA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-10-30_04,2025-10-29_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2510300108 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251030_062103_106628_65AD07C3 X-CRM114-Status: GOOD ( 34.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Russell, On Wed, Oct 29, 2025 at 09:22:49AM +0000, Russell King (Oracle) wrote: > > # Patch Series (current): net: stmmac: phylink PCS conversion part 3 > > (dodgy stuff) > > - QCS9100 Ride R3 - functionality seems to be fine (again, probably > > due to the changes only affecting SGMII mode). However, the warning > > added in patch 2 comes up whenever there's a speed change (I added > > an additional WARN_ON to check the sequence): > > [ 61.663685] qcom-ethqos 23000000.ethernet eth0: Link is Down > > [ 66.235461] dwmac: PCS configuration changed from phylink by glue, please report: 0x00001000 -> 0x00000000 > > That's clearing ANE, turning off AN. This will be because we're not > using the PCS code for 2500base-X. > > Can you try: > > 1. in stmmac_check_pcs_mode(), as a hack, add: > > if (priv->dma_cap.pcs && interface == PHY_INTERFACE_MODE_2500BASEX) > priv->hw->pcs = STMMAC_PCS_SGMII; > > 2. with part 3 added, please change dwmac4_pcs_init() to: > > phy_interface_t modes[] = { > PHY_INTERFACE_MODE_SGMII, > PHY_INTERFACE_MODE_2500BASEX, > }; > ... > return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE, > GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE, > modes, ARRAY_SIZE(modes)); > > This will cause the integrated PCS to also be used for 2500BASE-X. > > 3. modify dwmac_integrated_pcs_inband_caps() to return > LINK_INBAND_DISABLE for PHY_INTERFACE_MODE_2500BASEX. > > This should result in the warning going away for you. > > I'm not suggesting that this is a final solution. Here are my observations (with phylink logs if it helps): 1. Link up at 2.5G [ 8.429331] qcom-ethqos 23000000.ethernet: User ID: 0x20, Synopsys ID: 0x52 [ 8.436610] qcom-ethqos 23000000.ethernet: DWMAC4/5 [ 10.395163] qcom-ethqos 23000000.ethernet eth0: PHY stmmac-0:00 uses interfaces 4,23,27, validating 23 [ 10.407759] qcom-ethqos 23000000.ethernet eth0: interface 23 (2500base-x) rate match pause supports 0-7,9,13-14,47 [ 10.418507] qcom-ethqos 23000000.ethernet eth0: PHY [stmmac-0:00] driver [Aquantia AQR115C] (irq=343) [ 10.428003] qcom-ethqos 23000000.ethernet eth0: phy: 2500base-x setting supported 0000000,00000000,00008000,000062ff advertising 0000000,00000000,00008000,000062ff [ 10.461072] qcom-ethqos 23000000.ethernet eth0: Enabling Safety Features [ 10.478201] qcom-ethqos 23000000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported [ 10.487449] qcom-ethqos 23000000.ethernet eth0: registered PTP clock [ 10.494010] qcom-ethqos 23000000.ethernet eth0: configuring for phy/2500base-x link mode [ 10.494014] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/2500base-x [ 10.494018] qcom-ethqos 23000000.ethernet eth0: interface 2500base-x inband modes: pcs=01 phy=00 [ 10.494021] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/2500base-x [ 10.494024] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/2500base-x/none adv=0000000,00000000,00000000,00000000 pause=00 [ 10.508824] qcom-ethqos 23000000.ethernet eth0: phy link down 2500base-x/Unknown/Unknown/none/off/nolpi [ 15.099693] qcom-ethqos 23000000.ethernet eth0: phy link up 2500base-x/2.5Gbps/Full/none/rx/tx/nolpi [ 15.122160] dwmac: PCS configuration changed from phylink by glue, please report: 0x00041000 -> 0x00040000 [ 15.140458] qcom-ethqos 23000000.ethernet eth0: Link is Up - 2.5Gbps/Full - flow control rx/tx [ 15.140939] stmmac_pcs: Link Up As I understand it, the glue layer disables ANE at 2.5G. 2. Link up at 1G: [ 6.261112] qcom-ethqos 23000000.ethernet: User ID: 0x20, Synopsys ID: 0x52 [ 6.261116] qcom-ethqos 23000000.ethernet: DWMAC4/5 [ 9.051693] qcom-ethqos 23000000.ethernet eth0: PHY stmmac-0:00 uses interfaces 4,23,27, validating 23 [ 9.061261] qcom-ethqos 23000000.ethernet eth0: interface 23 (2500base-x) rate match pause supports 0-7,9,13-14,47 [ 9.061266] qcom-ethqos 23000000.ethernet eth0: PHY [stmmac-0:00] driver [Aquantia AQR115C] (irq=305) [ 9.061269] qcom-ethqos 23000000.ethernet eth0: phy: 2500base-x setting supported 0000000,00000000,00008000,000062ff advertising 0000000,00000000,00008000,000062ff [ 9.080324] qcom-ethqos 23000000.ethernet eth0: Enabling Safety Features [ 9.114550] qcom-ethqos 23000000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported [ 9.123870] qcom-ethqos 23000000.ethernet eth0: registered PTP clock [ 9.130412] qcom-ethqos 23000000.ethernet eth0: configuring for phy/2500base-x link mode [ 9.138726] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/2500base-x [ 9.138729] qcom-ethqos 23000000.ethernet eth0: interface 2500base-x inband modes: pcs=01 phy=00 [ 9.138731] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/2500base-x [ 9.164930] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/2500base-x/none adv=0000000,00000000,00000000,00000000 pause=00 [ 9.194764] qcom-ethqos 23000000.ethernet eth0: phy link down 2500base-x/Unknown/Unknown/none/off/nolpi [ 12.542771] qcom-ethqos 23000000.ethernet eth0: phy link up sgmii/1Gbps/Full/none/rx/tx/nolpi [ 12.553890] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/sgmii [ 12.561617] qcom-ethqos 23000000.ethernet eth0: interface sgmii inband modes: pcs=03 phy=03 [ 12.570220] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/sgmii [ 12.578367] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/sgmii/none adv=0000000,00000000,00000000,00000000 pause=03 [ 12.599545] stmmac_pcs: ANE process completed [ 12.607910] dwmac: PCS configuration changed from phylink by glue, please report: 0x00041000 -> 0x00041200 [ 12.616188] stmmac_pcs: Link Up [ 12.634351] qcom-ethqos 23000000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 12.639575] stmmac_pcs: ANE process completed [ 12.647498] stmmac_pcs: Link Up This is probably fine since Bit(9) is self-clearing and its value just after this is 0x00041000. > > Please note, however, that the stmmac driver does not support on-the-fly > reconfiguration of the PHY-side interface as it stands (and questionable > whether it ever will do.) The hardware samples phy_intf_sel inputs to > the core at reset (including, I believe, software reset) which > configures the core to use the appropriate PHY interface. Performing > any kind of reset is very disruptive to the core - likely even causes > the PTP timekeeping block to be reset. In my opinion, PHYs that switch > their host-side interface were not considered when this IP was > designed. > > To get stmmac's driver to a state where it _can_ do this if desired is > going to take a massive amount of work due to all these glue drivers. > > I do have patches which introduce a new callback into platform drivers > to set the phy_intf_sel inputs from the core code... but that's some > way off before it can be merged (too many other patches I need to get > in first.) > > I haven't noticed qcom-ethqos using a register field that corresponds > with the phy_intf_sel inputs, so even in that series, this driver > doesn't get converted. True, I think qcom-ethqos's behaviour is different than other glue drivers. For both SGMII and 2500Base-X, it uses the same ethqos_configure_sgmii() function which is just changing the SerDes speed and PCS and depending on the current speed. Ayaan