From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Jan Petrous <jan.petrous@oss.nxp.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Fabio Estevam <festevam@gmail.com>,
imx@lists.linux.dev, Jakub Kicinski <kuba@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, Paolo Abeni <pabeni@redhat.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
s32@nxp.com, Sascha Hauer <s.hauer@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>
Subject: Re: [PATCH net-next 02/11] net: stmmac: s32: move PHY_INTF_SEL_x definitions out of the way
Date: Tue, 4 Nov 2025 09:55:25 +0000 [thread overview]
Message-ID: <aQnNjWuytebZpZyW@shell.armlinux.org.uk> (raw)
In-Reply-To: <aQnJRgJqFY99kDUj@lsv051416.swis.nl-cdc01.nxp.com>
On Tue, Nov 04, 2025 at 10:37:10AM +0100, Jan Petrous wrote:
> On Mon, Nov 03, 2025 at 11:50:00AM +0000, Russell King (Oracle) wrote:
> > /* SoC PHY interface control register */
> > -#define PHY_INTF_SEL_MII 0x00
> > -#define PHY_INTF_SEL_SGMII 0x01
> > -#define PHY_INTF_SEL_RGMII 0x02
> > -#define PHY_INTF_SEL_RMII 0x08
> > +#define S32_PHY_INTF_SEL_MII 0x00
> > +#define S32_PHY_INTF_SEL_SGMII 0x01
> > +#define S32_PHY_INTF_SEL_RGMII 0x02
> > +#define S32_PHY_INTF_SEL_RMII 0x08
>
> Reviewed-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
Thanks. One question: is it possible that bits 3:1 are the dwmac
phy_intf_sel_i inputs, and bit 0 selects an external PCS which
is connected to the dwmac using GMII (and thus would be set bits
3:1 to zero) ?
It's not really relevant as the driver only appears to support
RGMII.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2025-11-04 9:55 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-03 11:49 [PATCH net-next 00/11] net: stmmac: multi-interface stmmac Russell King (Oracle)
2025-11-03 11:49 ` [PATCH net-next 01/11] net: stmmac: imx: use phylink's interface mode for set_clk_tx_rate() Russell King (Oracle)
2025-11-03 11:50 ` [PATCH net-next 02/11] net: stmmac: s32: move PHY_INTF_SEL_x definitions out of the way Russell King (Oracle)
2025-11-04 8:39 ` Maxime Chevallier
2025-11-04 9:37 ` Jan Petrous
2025-11-04 9:55 ` Russell King (Oracle) [this message]
2025-11-04 13:04 ` Jan Petrous
2025-11-03 11:50 ` [PATCH net-next 03/11] net: stmmac: add phy_intf_sel and ACTPHYIF definitions Russell King (Oracle)
2025-11-04 8:44 ` Maxime Chevallier
2025-11-03 11:50 ` [PATCH net-next 04/11] net: stmmac: add stmmac_get_phy_intf_sel() Russell King (Oracle)
2025-11-04 8:34 ` Maxime Chevallier
2025-11-04 8:49 ` Russell King (Oracle)
2025-11-04 9:07 ` Maxime Chevallier
2025-11-03 11:50 ` [PATCH net-next 05/11] net: stmmac: add support for configuring the phy_intf_sel inputs Russell King (Oracle)
2025-11-03 11:50 ` [PATCH net-next 06/11] net: stmmac: imx: convert to PHY_INTF_SEL_xxx Russell King (Oracle)
2025-11-03 11:50 ` [PATCH net-next 07/11] net: stmmac: imx: use FIELD_PREP()/FIELD_GET() for PHY_INTF_SEL_x Russell King (Oracle)
2025-11-03 11:50 ` [PATCH net-next 08/11] net: stmmac: imx: use stmmac_get_phy_intf_sel() Russell King (Oracle)
2025-11-03 11:50 ` [PATCH net-next 09/11] net: stmmac: imx: simplify set_intf_mode() implementations Russell King (Oracle)
2025-11-03 11:50 ` [PATCH net-next 10/11] net: stmmac: imx: cleanup arguments for set_intf_mode() method Russell King (Oracle)
2025-11-03 11:50 ` [PATCH net-next 11/11] net: stmmac: imx: use ->set_phy_intf_sel() Russell King (Oracle)
2025-11-05 0:20 ` [PATCH net-next 00/11] net: stmmac: multi-interface stmmac patchwork-bot+netdevbpf
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