Linux-ARM-Kernel Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Frank Li <Frank.li@nxp.com>
To: Niklas Cassel <cassel@kernel.org>
Cc: "Bjorn Helgaas" <helgaas@kernel.org>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kever Yang" <kever.yang@rock-chips.com>,
	"Simon Xue" <xxm@rock-chips.com>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Dragan Simic" <dsimic@manjaro.org>,
	"FUKAUMI Naoki" <naoki@radxa.com>,
	"Diederik de Haas" <diederik@cknow-tech.com>,
	"Richard Zhu" <hongxing.zhu@nxp.com>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Hans Zhang" <hans.zhang@cixtech.com>,
	linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, kernel@pengutronix.de,
	"Bjorn Helgaas" <bhelgaas@google.com>
Subject: Re: [PATCH v2 1/4] PCI: dwc: Advertise L1 PM Substates only if driver requests it
Date: Tue, 18 Nov 2025 19:45:21 -0500	[thread overview]
Message-ID: <aR0TIeJ6CWeB4YmT@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <aRz3Gnw-0IRtUj9f@ryzen>

On Tue, Nov 18, 2025 at 11:45:46PM +0100, Niklas Cassel wrote:
> Hello Frank,
>
> On Tue, Nov 18, 2025 at 05:20:36PM -0500, Frank Li wrote:
> > >
> > > +	dw_pcie_hide_unsupported_l1ss(pci);
> > > +
> >
> > Need call dw_pcie_dbi_ro_wr_en(pci) to access PCI_L1SS_CAP.
>
> I disagree.
>
> At least when checking two different versions of the databook
> (one very old and one more recent), the register fields that we
> are touching are all marked as:
>
> Dbi: R/W (sticky)
>

Yes, you are right. Sorry for noise.

Frank

>
> There are some other register fields in PCI_L1SS_CAP, e.g.
> NEXT_OFFSET, CAP_VERSION, and EXTENDED_CAP_ID that are marked as:
>
> Dbi: if (DBI_RO_WR_EN == 1) then R/W(sticky) else R(sticky)
> Note: This register field is sticky.
>
>
> But since we are not touching any of those register fields,
> the current code should be good as is.
>
>
> Perhaps your version of the databook says differently than the
> two versions I have, but considering that they seem to have
> intentionally made these R/W without the need for DBI_RO_WR_EN,
> I don't see a reason why they would want to change it even in
> the absolute newest IP version.
>
>
> Kind regards,
> Niklas


  reply	other threads:[~2025-11-19  0:45 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-18 21:42 [PATCH v2 0/4] PCI: dwc: Advertise L1 PM Substates only if driver requests it Bjorn Helgaas
2025-11-18 21:42 ` [PATCH v2 1/4] " Bjorn Helgaas
2025-11-18 22:20   ` Frank Li
2025-11-18 22:45     ` Niklas Cassel
2025-11-19  0:45       ` Frank Li [this message]
2025-11-18 22:34   ` Frank Li
2025-11-19 11:08     ` Niklas Cassel
2025-11-19 15:58       ` Frank Li
2025-11-20  0:53         ` Shawn Lin
2025-11-24 21:22       ` Bjorn Helgaas
2025-11-20  7:52     ` Manivannan Sadhasivam
2025-11-20  7:40   ` Manivannan Sadhasivam
2025-11-24 21:19     ` Bjorn Helgaas
2025-11-25  5:25       ` Manivannan Sadhasivam
2025-11-18 21:42 ` [PATCH v2 2/4] PCI: tegra194: Remove unnecessary L1SS disable code Bjorn Helgaas
2025-11-18 21:42 ` [PATCH v2 3/4] PCI: dw-rockchip: Configure L1SS support Bjorn Helgaas
2025-11-18 21:42 ` [PATCH v2 4/4] arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1 Bjorn Helgaas
2025-11-24 22:50 ` [PATCH v2 0/4] PCI: dwc: Advertise L1 PM Substates only if driver requests it Bjorn Helgaas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aR0TIeJ6CWeB4YmT@lizhi-Precision-Tower-5810 \
    --to=frank.li@nxp.com \
    --cc=bhelgaas@google.com \
    --cc=cassel@kernel.org \
    --cc=conor@kernel.org \
    --cc=diederik@cknow-tech.com \
    --cc=dlemoal@kernel.org \
    --cc=dsimic@manjaro.org \
    --cc=festevam@gmail.com \
    --cc=hans.zhang@cixtech.com \
    --cc=heiko@sntech.de \
    --cc=helgaas@kernel.org \
    --cc=hongxing.zhu@nxp.com \
    --cc=jonathanh@nvidia.com \
    --cc=kernel@pengutronix.de \
    --cc=kever.yang@rock-chips.com \
    --cc=krzk@kernel.org \
    --cc=kwilczynski@kernel.org \
    --cc=l.stach@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=mani@kernel.org \
    --cc=naoki@radxa.com \
    --cc=robh@kernel.org \
    --cc=s.hauer@pengutronix.de \
    --cc=shawn.lin@rock-chips.com \
    --cc=shawnguo@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=xxm@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox