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From: Oliver Upton <oupton@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	Fuad Tabba <tabba@google.com>, Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH v3 5/5] KVM: arm64: GICv3: Force exit to sync ICH_HCR_EL2.En
Date: Mon, 17 Nov 2025 23:16:49 -0800	[thread overview]
Message-ID: <aRwdYZ98cwIeg-P3@kernel.org> (raw)
In-Reply-To: <20251117091527.1119213-6-maz@kernel.org>

Hey Marc,

On Mon, Nov 17, 2025 at 09:15:27AM +0000, Marc Zyngier wrote:
> FEAT_NV2 is pretty terrible for anything that tries to enforce immediate
> effects, and writing to ICH_HCR_EL2 in the hope to disable a maintenance
> interrupt is vain. This only hits memory, and the guest hasn't cleared
> anything -- the MI will fire.
> 
> For example, running the vgic_irq test under NV results in about 800
> maintenance interrupts being actually handled by the L1 guest,
> when none were expected.
> 
> As a cheap workaround, read back ICH_MISR_EL2 after writing 0 to
> ICH_HCR_EL2. This is very cheap on real HW, and causes a trap to
> the host in NV, giving it the opportunity to retire the pending
> MI. With this, the above test tuns to completion without any MI
> being actually handled.

Just to make sure I'm following, the scenario you're talking about is
we've already put the vgic into a non-nested state, populated an LR with
the pending MI at the time of that switch and L0 has no signal for when
it can drop the LR / pending state.

> Yes, this is really poor...

+1 :-/

> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
>  arch/arm64/kvm/hyp/vgic-v3-sr.c      | 7 +++++++
>  arch/arm64/kvm/vgic/vgic-v3-nested.c | 6 ++++--
>  2 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c
> index 99342c13e1794..f503cf01ac82c 100644
> --- a/arch/arm64/kvm/hyp/vgic-v3-sr.c
> +++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c
> @@ -244,6 +244,13 @@ void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if)
>  	}
>  
>  	write_gicreg(0, ICH_HCR_EL2);
> +
> +	/*
> +	 * Hack alert: On NV, this results in a trap so that the above
> +	 * write actually takes effect...
> +	 */
> +	isb();
> +	read_gicreg(ICH_MISR_EL2);

I'm all for writing correct code but since we don't actually care about
the value of MISR_EL2 do we need the ISB? There's no need for a CSE for
non-NV and you'd get it 'for free' by way of exception entry in the NV
case.

Thanks,
Oliver


  parent reply	other threads:[~2025-11-18  7:16 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-17  9:15 [PATCH v3 0/5] KVM: arm64: Add LR overflow infrastructure (the dregs, the bad and the ugly) Marc Zyngier
2025-11-17  9:15 ` [PATCH v3 1/5] KVM: arm64: GICv3: Don't advertise ICH_HCR_EL2.En==1 when no vgic is configured Marc Zyngier
2025-11-17 10:34   ` Fuad Tabba
2025-11-17 11:28     ` Marc Zyngier
2025-11-17 11:29   ` Fuad Tabba
2025-11-17  9:15 ` [PATCH v3 2/5] KVM: arm64: GICv3: Completely disable trapping on vcpu exit Marc Zyngier
2025-11-17 10:36   ` Fuad Tabba
2025-11-17  9:15 ` [PATCH v3 3/5] KVM: arm64: GICv3: nv: Resync LRs/VMCR/HCR early for better MI emulation Marc Zyngier
2025-11-17 11:24   ` Fuad Tabba
2025-11-17 11:34     ` Marc Zyngier
2025-11-17 11:37       ` Fuad Tabba
2025-11-17  9:15 ` [PATCH v3 4/5] KVM: arm64: GICv3: Remove vgic_hcr workaround handling leftovers Marc Zyngier
2025-11-17 11:25   ` Fuad Tabba
2025-11-17  9:15 ` [PATCH v3 5/5] KVM: arm64: GICv3: Force exit to sync ICH_HCR_EL2.En Marc Zyngier
2025-11-17 11:35   ` Fuad Tabba
2025-11-17 11:42     ` Marc Zyngier
2025-11-17 11:48       ` Fuad Tabba
2025-11-18  7:16   ` Oliver Upton [this message]
2025-11-18  8:54     ` Marc Zyngier
2025-11-17  9:40 ` [PATCH v3 0/5] KVM: arm64: Add LR overflow infrastructure (the dregs, the bad and the ugly) Fuad Tabba
2025-11-17  9:54   ` Marc Zyngier
2025-11-17 10:18     ` Fuad Tabba
2025-11-17 12:54       ` Fuad Tabba
2025-11-18  7:20 ` Oliver Upton
2025-11-18 13:59   ` Fuad Tabba
2025-11-18 19:06     ` Marc Zyngier
2025-11-19 10:37       ` Fuad Tabba
2025-11-18 23:34 ` Oliver Upton

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