Re: [PATCH] arm64: dts: imx95: Use GPU_CGC as core clock for GPU

[Rain Yang <jiyu.yang@oss.nxp.com>]

On Sat, Nov 29, 2025 at 03:31:30PM +0100, Marek Vasut wrote:
>The i.MX95 imx-sm introduced new GPU_CGC clock since imx-sm commit
>ca5e078833fa ("SM-128: Add clock management via CCM LPCG direct control")
>which are downstream clock of GPU clock. These new GPU_CGC clock
>gate the existing GPU clock. Currently, without clk_ignore_unused
>on kernel command line, those new GPU_CGC clock are unused and the
>kernel will disable them. This has no impact on i.MX95 A0/A1, but
>does prevent GPU register access from working at all on i.MX95 B0.
>The GPU_CGC clock are present on both i.MX95 A0/A1/B0, therefore
>update the DT such, that the GPU core clock are the GPU_CGC clock.
>When the panthor driver enables the GPU core clock, it enables both
>the GPU_CGC as well as its parent GPU clock.
>
>Fixes: 67934f248e64 ("arm64: dts: imx95: Describe Mali G310 GPU")
>Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
>---
>Cc: Conor Dooley <conor+dt@kernel.org>
>Cc: Fabio Estevam <festevam@gmail.com>
>Cc: Frank Li <Frank.li@nxp.com>
>Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
>Cc: Peng Fan <peng.fan@nxp.com>
>Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
>Cc: Rain Yang <jiyu.yang@oss.nxp.com>
>Cc: Rob Herring <robh@kernel.org>
>Cc: Sascha Hauer <s.hauer@pengutronix.de>
>Cc: Shawn Guo <shawnguo@kernel.org>
>Cc: devicetree@vger.kernel.org
>Cc: imx@lists.linux.dev
>Cc: linux-arm-kernel@lists.infradead.org
>---
> arch/arm64/boot/dts/freescale/imx95-clock.h | 1 +
> arch/arm64/boot/dts/freescale/imx95.dtsi    | 2 +-
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
>diff --git a/arch/arm64/boot/dts/freescale/imx95-clock.h b/arch/arm64/boot/dts/freescale/imx95-clock.h
>index e1f91203e7947..22311612e4403 100644
>--- a/arch/arm64/boot/dts/freescale/imx95-clock.h
>+++ b/arch/arm64/boot/dts/freescale/imx95-clock.h
>@@ -183,5 +183,6 @@
> #define IMX95_CLK_SEL_A55P                 (IMX95_CCM_NUM_CLK_SRC + 123 + 7)
> #define IMX95_CLK_SEL_DRAM                 (IMX95_CCM_NUM_CLK_SRC + 123 + 8)
> #define IMX95_CLK_SEL_TEMPSENSE            (IMX95_CCM_NUM_CLK_SRC + 123 + 9)
>+#define IMX95_CLK_GPU_CGC                  (IMX95_CCM_NUM_CLK_SRC + 123 + 10)
> 
> #endif	/* __CLOCK_IMX95_H */
>diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
>index 6091c2713fa48..47f20e501315f 100644
>--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
>+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
>@@ -2874,7 +2874,7 @@ netc_emdio: mdio@0,0 {
> 		gpu: gpu@4d900000 {
> 			compatible = "nxp,imx95-mali", "arm,mali-valhall-csf";
> 			reg = <0 0x4d900000 0 0x480000>;
>-			clocks = <&scmi_clk IMX95_CLK_GPU>, <&scmi_clk IMX95_CLK_GPUAPB>;
>+			clocks = <&scmi_clk IMX95_CLK_GPU_CGC>, <&scmi_clk IMX95_CLK_GPUAPB>;
> 			clock-names = "core", "coregroup";
> 			interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
> 				     <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
>-- 
>2.51.0
>
Hi Marek,

Thanks for integrating this downstream patch. Please note that CLK_GPUAPB and CLK_GPU are
always-on, so the commit message should be amended accordingly.
Additionally, the IMX95_CLK_GPUAPB handle shall be removed, as there is no valid OPP entry
in the frequency table, this also helps minimize differences between downstream and upstream,
reducing maintenance effort.