From: Will Deacon <will@kernel.org>
To: Luke Yang <luyang@redhat.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Jirka Hladky <jhladky@redhat.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Joe Mario <jmario@redhat.com>
Subject: Re: [PATCH] arm64: clear_user: align __arch_clear_user() to 128B for I-cache efficiency
Date: Mon, 24 Nov 2025 13:38:25 +0000 [thread overview]
Message-ID: <aSRf0doyqsnYk3RO@willie-the-truck> (raw)
In-Reply-To: <CAL2CeByu46f48j8O9=237fvhpPUCsKjOZkFuuHU3xrr3wVF5Eg@mail.gmail.com>
On Fri, Nov 21, 2025 at 12:04:55AM -0500, Luke Yang wrote:
> On aarch64 kernels, recent changes (specifically irqbypass patch
> https://lore.kernel.org/all/20250516230734.2564775-6-seanjc@google.com/)
> shifted __arch_clear_user() such that the tight zeroing loop straddles
> I-cache lines. This causes measurable read performance regression when
> reading from /dev/zero.
>
> Add `.p2align 6` (64-byte alignment) to guarantee the loop stays within a
> single I-cache boundary, restoring the previous IPC and throughput.
Hmm, but what's special about __arch_clear_user()? If we make this change,
anybody could surely make similar arguments for other functions on their
hot paths?
Amusingly, there's CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B to play around
with that and it sounds like the irqbyass change you cite calls into
the category of changes highlighted by the Kconfig text.
Will
next prev parent reply other threads:[~2025-11-24 13:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-21 5:04 [PATCH] arm64: clear_user: align __arch_clear_user() to 128B for I-cache efficiency Luke Yang
2025-11-24 13:38 ` Will Deacon [this message]
2025-11-25 3:45 ` Luke Yang
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