From: Will Deacon <will@kernel.org>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: jean-philippe@linaro.org, robin.murphy@arm.com, joro@8bytes.org,
jgg@nvidia.com, balbirs@nvidia.com, miko.lenczewski@arm.com,
peterz@infradead.org, kevin.tian@intel.com, praan@google.com,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 4/7] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array
Date: Mon, 24 Nov 2025 21:42:55 +0000 [thread overview]
Message-ID: <aSTRX5RJJhfNU6l3@willie-the-truck> (raw)
In-Reply-To: <b6e1b5d0ac0157fc06b5cd20c5cd72caec892c47.1762588839.git.nicolinc@nvidia.com>
On Sat, Nov 08, 2025 at 12:08:05AM -0800, Nicolin Chen wrote:
> When a master is attached from an old domain to a new domain, it needs to
> build an invalidation array to delete and add the array entries from/onto
> the invalidation arrays of those two domains, passed via the to_merge and
> to_unref arguments into arm_smmu_invs_merge/unref() respectively.
>
> Since the master->num_streams might differ across masters, a memory would
> have to be allocated when building an to_merge/to_unref array which might
> fail with -ENOMEM.
>
> On the other hand, an attachment to arm_smmu_blocked_domain must not fail
> so it's the best to avoid any memory allocation in that path.
>
> Pre-allocate a fixed size invalidation array for every master. This array
> will be used as a scratch to fill dynamically when building a to_merge or
> to_unref invs array. Sort fwspec->ids in an ascending order to fit to the
> arm_smmu_invs_merge() function.
>
> Co-developed-by: Jason Gunthorpe <jgg@nvidia.com>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 8 ++++++
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 27 +++++++++++++++++++++
> 2 files changed, 35 insertions(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 757158b9ea655..7b81a82c0dfe4 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -922,6 +922,14 @@ struct arm_smmu_master {
> struct arm_smmu_device *smmu;
> struct device *dev;
> struct arm_smmu_stream *streams;
> + /*
> + * Scratch memory for a to_merge or to_unref array to build a per-domain
> + * invalidation array. It'll be pre-allocated with enough enries for all
> + * possible build scenarios. It can be used by only one caller at a time
> + * until the arm_smmu_invs_merge/unref() finishes. Must be locked by the
> + * iommu_group mutex.
> + */
> + struct arm_smmu_invs *build_invs;
> struct arm_smmu_vmaster *vmaster; /* use smmu->streams_mutex */
> /* Locked by the iommu core using the group mutex */
> struct arm_smmu_ctx_desc_cfg cd_table;
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 8266d0839a927..26b8492a13f20 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -3693,12 +3693,22 @@ static int arm_smmu_init_sid_strtab(struct arm_smmu_device *smmu, u32 sid)
> return 0;
> }
>
> +static int arm_smmu_ids_cmp(const void *_l, const void *_r)
> +{
> + const typeof_member(struct iommu_fwspec, ids[0]) *l = _l;
> + const typeof_member(struct iommu_fwspec, ids[0]) *r = _r;
> +
> + return cmp_int(*l, *r);
> +}
> +
> static int arm_smmu_insert_master(struct arm_smmu_device *smmu,
> struct arm_smmu_master *master)
> {
> int i;
> int ret = 0;
> struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(master->dev);
> + bool ats_supported = dev_is_pci(master->dev) &&
> + pci_ats_supported(to_pci_dev(master->dev));
>
> master->streams = kcalloc(fwspec->num_ids, sizeof(*master->streams),
> GFP_KERNEL);
> @@ -3706,6 +3716,21 @@ static int arm_smmu_insert_master(struct arm_smmu_device *smmu,
> return -ENOMEM;
> master->num_streams = fwspec->num_ids;
>
> + if (!ats_supported) {
> + /* Base case has 1 ASID entry or maximum 2 VMID entries */
> + master->build_invs = arm_smmu_invs_alloc(2);
> + } else {
> + /* Put the ids into order for sorted to_merge/to_unref arrays */
> + sort_nonatomic(fwspec->ids, fwspec->num_ids,
> + sizeof(fwspec->ids[0]), arm_smmu_ids_cmp, NULL);
> + /* ATS case adds num_ids of entries, on top of the base case */
> + master->build_invs = arm_smmu_invs_alloc(2 + fwspec->num_ids);
Although I can't point at a specific issue here, I'm nervous about mutating
the 'fwspec->ids' array from within the driver, The array isn't allocated
or populated directly by the driver and so I don't think we really have any
business sorting it. Could we hack iommu_fwspec_add_ids() to keep the array
ordered instead?
Will
next prev parent reply other threads:[~2025-11-24 21:43 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-08 8:08 [PATCH v5 0/7] iommu/arm-smmu-v3: Introduce an RCU-protected invalidation array Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 1/7] iommu/arm-smmu-v3: Explicitly set smmu_domain->stage for SVA Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 2/7] iommu/arm-smmu-v3: Add an inline arm_smmu_domain_free() Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 3/7] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array Nicolin Chen
2025-11-24 21:42 ` Will Deacon
2025-11-24 22:41 ` Nicolin Chen
2025-11-24 23:03 ` Jason Gunthorpe
2025-11-26 1:07 ` Nicolin Chen
2025-11-25 4:14 ` Nicolin Chen
2025-11-25 13:43 ` Jason Gunthorpe
2025-11-25 16:20 ` Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 4/7] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array Nicolin Chen
2025-11-24 21:42 ` Will Deacon [this message]
2025-11-24 22:43 ` Nicolin Chen
2025-11-24 23:08 ` Jason Gunthorpe
2025-11-24 23:31 ` Nicolin Chen
2025-11-25 7:43 ` Nicolin Chen
2025-11-25 13:07 ` Jason Gunthorpe
2025-11-08 8:08 ` [PATCH v5 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs when attaching masters Nicolin Chen
2025-11-24 21:43 ` Will Deacon
2025-11-24 23:13 ` Jason Gunthorpe
2025-11-24 23:19 ` Nicolin Chen
2025-11-26 0:56 ` Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range() Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 7/7] iommu/arm-smmu-v3: Perform per-domain invalidations using arm_smmu_invs Nicolin Chen
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