From: Nicolin Chen <nicolinc@nvidia.com>
To: Will Deacon <will@kernel.org>
Cc: <jean-philippe@linaro.org>, <robin.murphy@arm.com>,
<joro@8bytes.org>, <jgg@nvidia.com>, <balbirs@nvidia.com>,
<miko.lenczewski@arm.com>, <peterz@infradead.org>,
<kevin.tian@intel.com>, <praan@google.com>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 3/7] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array
Date: Mon, 24 Nov 2025 14:41:15 -0800 [thread overview]
Message-ID: <aSTfC5WFoa6sJlBj@Asurada-Nvidia> (raw)
In-Reply-To: <aSTRRyTBh1nATwBa@willie-the-truck>
On Mon, Nov 24, 2025 at 09:42:31PM +0000, Will Deacon wrote:
> On Sat, Nov 08, 2025 at 12:08:04AM -0800, Nicolin Chen wrote:
> > +EXPORT_SYMBOL_IF_KUNIT(arm_smmu_invs_merge);
>
> There's nothing really SMMU-specific about this data structure manipulation.
> Do you think we can abstract the invalidation array concept into a library
> which other IOMMU drivers could use too?
Yea, I am trying to shift to that at this moment, hopefully to
combine the iotlb tag (asid/vmid) allocation as well. We do see
it could be quite useful in AMD driver already.
And I will address the other remarks of yours.
Thanks
Nicolin
next prev parent reply other threads:[~2025-11-24 22:41 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-08 8:08 [PATCH v5 0/7] iommu/arm-smmu-v3: Introduce an RCU-protected invalidation array Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 1/7] iommu/arm-smmu-v3: Explicitly set smmu_domain->stage for SVA Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 2/7] iommu/arm-smmu-v3: Add an inline arm_smmu_domain_free() Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 3/7] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array Nicolin Chen
2025-11-24 21:42 ` Will Deacon
2025-11-24 22:41 ` Nicolin Chen [this message]
2025-11-24 23:03 ` Jason Gunthorpe
2025-11-26 1:07 ` Nicolin Chen
2025-11-25 4:14 ` Nicolin Chen
2025-11-25 13:43 ` Jason Gunthorpe
2025-11-25 16:20 ` Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 4/7] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array Nicolin Chen
2025-11-24 21:42 ` Will Deacon
2025-11-24 22:43 ` Nicolin Chen
2025-11-24 23:08 ` Jason Gunthorpe
2025-11-24 23:31 ` Nicolin Chen
2025-11-25 7:43 ` Nicolin Chen
2025-11-25 13:07 ` Jason Gunthorpe
2025-11-08 8:08 ` [PATCH v5 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs when attaching masters Nicolin Chen
2025-11-24 21:43 ` Will Deacon
2025-11-24 23:13 ` Jason Gunthorpe
2025-11-24 23:19 ` Nicolin Chen
2025-11-26 0:56 ` Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range() Nicolin Chen
2025-11-08 8:08 ` [PATCH v5 7/7] iommu/arm-smmu-v3: Perform per-domain invalidations using arm_smmu_invs Nicolin Chen
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