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From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Will Deacon <will@kernel.org>, <jean-philippe@linaro.org>,
	<robin.murphy@arm.com>, <joro@8bytes.org>, <balbirs@nvidia.com>,
	<miko.lenczewski@arm.com>, <peterz@infradead.org>,
	<kevin.tian@intel.com>, <praan@google.com>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs when attaching masters
Date: Mon, 24 Nov 2025 15:19:28 -0800	[thread overview]
Message-ID: <aSToANNpeb5GxBP7@Asurada-Nvidia> (raw)
In-Reply-To: <20251124231341.GO153257@nvidia.com>

On Mon, Nov 24, 2025 at 07:13:41PM -0400, Jason Gunthorpe wrote:
> On Mon, Nov 24, 2025 at 09:43:18PM +0000, Will Deacon wrote:
> > > +	/*
> > > +	 * We are committed to updating the STE. Ensure the invalidation array
> > > +	 * is visable to concurrent map/unmap threads, and acquire any racying
> > > +	 * IOPTE updates.
> > > +	 */
> > > +	smp_mb();
> > 
> > Sorry, but the comment hasn't really helped me here. We're ordering the
> > publishing of the invalidation array above before ... what?
> 
> "concurrent map/unmap threads" means other threads calling
> arm_smmu_iotlb_sync().. I think the matching comment describing this
> and introducing the pair'd smp_mb() is in a later patch.
... 
> Nicolin maybe this barrier line should be moved to be added in the
> patch that add's the pair'd barrier and description?

Sure. I can move that to PATCH-6.

Thanks
Nicolin


  reply	other threads:[~2025-11-24 23:20 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-08  8:08 [PATCH v5 0/7] iommu/arm-smmu-v3: Introduce an RCU-protected invalidation array Nicolin Chen
2025-11-08  8:08 ` [PATCH v5 1/7] iommu/arm-smmu-v3: Explicitly set smmu_domain->stage for SVA Nicolin Chen
2025-11-08  8:08 ` [PATCH v5 2/7] iommu/arm-smmu-v3: Add an inline arm_smmu_domain_free() Nicolin Chen
2025-11-08  8:08 ` [PATCH v5 3/7] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array Nicolin Chen
2025-11-24 21:42   ` Will Deacon
2025-11-24 22:41     ` Nicolin Chen
2025-11-24 23:03       ` Jason Gunthorpe
2025-11-26  1:07         ` Nicolin Chen
2025-11-25  4:14     ` Nicolin Chen
2025-11-25 13:43       ` Jason Gunthorpe
2025-11-25 16:20         ` Nicolin Chen
2025-11-08  8:08 ` [PATCH v5 4/7] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array Nicolin Chen
2025-11-24 21:42   ` Will Deacon
2025-11-24 22:43     ` Nicolin Chen
2025-11-24 23:08       ` Jason Gunthorpe
2025-11-24 23:31         ` Nicolin Chen
2025-11-25  7:43           ` Nicolin Chen
2025-11-25 13:07           ` Jason Gunthorpe
2025-11-08  8:08 ` [PATCH v5 5/7] iommu/arm-smmu-v3: Populate smmu_domain->invs when attaching masters Nicolin Chen
2025-11-24 21:43   ` Will Deacon
2025-11-24 23:13     ` Jason Gunthorpe
2025-11-24 23:19       ` Nicolin Chen [this message]
2025-11-26  0:56       ` Nicolin Chen
2025-11-08  8:08 ` [PATCH v5 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range() Nicolin Chen
2025-11-08  8:08 ` [PATCH v5 7/7] iommu/arm-smmu-v3: Perform per-domain invalidations using arm_smmu_invs Nicolin Chen

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