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From: Anirudh Rayabharam <anirudh@anirudhrb.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org,
	decui@microsoft.com, longli@microsoft.com,
	catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de,
	Arnd Bergmann <arnd@arndb.de>,
	akpm@linux-foundation.org, agordeev@linux.ibm.com,
	guoweikang.kernel@gmail.com, osandov@fb.com, bsz@amazon.de,
	linux-hyperv@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org
Subject: Re: [PATCH 2/3] irqchip/gic-v3: allocate one SGI for MSHV
Date: Wed, 26 Nov 2025 08:51:59 +0000	[thread overview]
Message-ID: <aSa_rxG80LDXDlhr@anirudh-surface.localdomain> (raw)
In-Reply-To: <86bjkqq9dp.wl-maz@kernel.org>

On Tue, Nov 25, 2025 at 06:01:38PM +0000, Marc Zyngier wrote:
> On Tue, 25 Nov 2025 17:01:23 +0000,
> Anirudh Raybharam <anirudh@anirudhrb.com> wrote:
> > 
> > From: Anirudh Rayabharam <anirudh@anirudhrb.com>
> > 
> > From: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>
> > 
> > Currently SGIs are allocated only for the smp subsystem. The MSHV
> > (Microsoft Hypervisor aka Hyper-V) code also needs an SGI that can be
> > programmed into the SYNIC to receive intercepts from the hypervisor. The
> > hypervisor would then assert this SGI whenever there is a guest
> > VMEXIT.
> > 
> > Allocate one SGI for MSHV use in addition to the SGIs allocated for
> > IPIs. When running under MSHV, the full SGI range can be used i.e. no
> > need to reserve SGIs 8-15 for the secure firmware.
> > 
> > Since this SGI is needed only when running as a parent partition (i.e.
> > we can create guest partitions), check for it before allocating an SGI.
> 
> Sorry, but that's not an acceptable situation.
> 
> SGIs are for Linux to use, nobody else, and that allocation must be

Why does this restriction exist? In the code SGIs 8-15 are left for
secure firmware. So, things other than Linux can use SGIs. Why not MSHV
then?

> the same irrespective of whether Linux runs virtualised or not. This
> also won't work with GICv5 (there are no SGIs at all), so this is
> doomed from the very start, and would immediately create technical
> debt.

Hyper-V always presents a GICv3 so we don't need to worry about GICv5.

> 
> If you want to signal an interrupt to Linux, expose a device with an
> interrupt in a firmware table (i.e. not an SGI), and use that in your
> driver.

You mean in the ACPI tables? That would require us to modify the
firmware to expose this virtual device right?

Anirudh.

> 
> Thanks,
> 
> 	M.
> 
> -- 
> Without deviation from the norm, progress is not possible.


  reply	other threads:[~2025-11-26  8:52 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-25 17:01 [PATCH 0/3] MSHV intercepts support on arm64 Anirudh Raybharam
2025-11-25 17:01 ` [PATCH 1/3] arm64: hyperv: move hyperv detection earlier in boot Anirudh Raybharam
2025-11-25 21:19   ` kernel test robot
2025-11-27 10:36   ` kernel test robot
2025-11-25 17:01 ` [PATCH 2/3] irqchip/gic-v3: allocate one SGI for MSHV Anirudh Raybharam
2025-11-25 18:01   ` Marc Zyngier
2025-11-26  8:51     ` Anirudh Rayabharam [this message]
2025-11-26  9:02       ` Marc Zyngier
2025-11-26 10:46         ` Anirudh Rayabharam
2025-11-26 21:27           ` Marc Zyngier
2025-11-27  6:26             ` Anirudh Rayabharam
2025-11-26 22:25   ` Wei Liu
2025-11-27 10:36   ` kernel test robot
2025-11-25 17:01 ` [PATCH 3/3] mshv: add support for VMEXIT interrupts on aarch64 Anirudh Raybharam

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