From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Mostafa Saleh <smostafa@google.com>, <will@kernel.org>,
<robin.murphy@arm.com>, <joro@8bytes.org>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>, <skolothumtho@nvidia.com>,
<praan@google.com>, <xueshuai@linux.alibaba.com>
Subject: Re: [PATCH rc v3 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE update sequence
Date: Tue, 16 Dec 2025 12:46:59 -0800 [thread overview]
Message-ID: <aUHFQ1Ep2x4/vdk/@Asurada-Nvidia> (raw)
In-Reply-To: <20251216000952.GA6079@nvidia.com>
On Mon, Dec 15, 2025 at 08:09:52PM -0400, Jason Gunthorpe wrote:
> On Sun, Dec 14, 2025 at 10:32:35PM +0000, Mostafa Saleh wrote:
> > However, this approach makes it a bit explicit which bits are ignored, if we
> > keep this logic, I think changing the name of get_ignored() might help, to
> > something as "get_allowed_break()" or "get_update_safe()"?
>
> update_safe sounds good to me
I have renamed the op and changed entry_set to void. I'll send v4
later today.
Thanks
Nicolin
next prev parent reply other threads:[~2025-12-16 20:47 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-10 2:45 [PATCH rc v3 0/4] : iommu/arm-smmu-v3: Fix hitless STE update in nesting cases Nicolin Chen
2025-12-10 2:45 ` [PATCH rc v3 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE update sequence Nicolin Chen
2025-12-14 22:32 ` Mostafa Saleh
2025-12-15 20:51 ` Nicolin Chen
2025-12-16 22:49 ` Mostafa Saleh
2025-12-16 0:09 ` Jason Gunthorpe
2025-12-16 20:46 ` Nicolin Chen [this message]
2025-12-16 22:58 ` Mostafa Saleh
2025-12-17 0:23 ` Jason Gunthorpe
2025-12-10 2:45 ` [PATCH rc v3 2/4] iommu/arm-smmu-v3: Ignore STE MEV when computing the " Nicolin Chen
2025-12-10 2:45 ` [PATCH rc v3 3/4] iommu/arm-smmu-v3: Ignore STE EATS " Nicolin Chen
2025-12-10 2:45 ` [PATCH rc v3 4/4] iommu/arm-smmu-v3-test: Add nested s1bypass/s1dssbypass coverage Nicolin Chen
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