* [PATCH v2 1/2] arm64: dts: imx8mp libra: add and update display overlays
2025-11-17 12:45 [PATCH v2 0/2] Add and Update display overlays for libra Yashwanth Varakala
@ 2025-11-17 12:45 ` Yashwanth Varakala
2025-11-17 12:45 ` [PATCH v2 2/2] arm64: dts: imx8mp libra: add peb-av-10 expansion board overlay Yashwanth Varakala
2025-12-29 3:52 ` [PATCH v2 0/2] Add and Update display overlays for libra Shawn Guo
2 siblings, 0 replies; 4+ messages in thread
From: Yashwanth Varakala @ 2025-11-17 12:45 UTC (permalink / raw)
To: shawnguo, s.hauer, kernel, festevam, robh, krzk+dt, conor+dt
Cc: imx, linux-arm-kernel, devicetree, linux-kernel, upstream,
peng.fan, y.varakala
Add imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso
devicetree display overlay for the i.MX8MP Libra RDK platform.
The overlay enable LVDS display configuration.
To keep the consistent style of panel and backlight nodes and labels.
They are updated in imx8mp-libra base board devicetree and
etml1010g3dra display overlay.
Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
---
arch/arm64/boot/dts/freescale/Makefile | 8 +++-
...8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso | 2 +-
...ibra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso | 44 +++++++++++++++++++
.../dts/freescale/imx8mp-libra-rdk-fpsc.dts | 4 +-
4 files changed, 53 insertions(+), 5 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 525ef180481d..eb38dcc76b84 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -219,8 +219,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc.dtb
-imx8mp-libra-rdk-fpsc-lvds-dtbs += imx8mp-libra-rdk-fpsc.dtb imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo
-dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds.dtb
+imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra-dtbs += imx8mp-libra-rdk-fpsc.dtb \
+ imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo
+imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01-dtbs += imx8mp-libra-rdk-fpsc.dtb \
+ imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-enc-carrier-board.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
index 1dcf249ca90d..02889d691c01 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
@@ -34,7 +34,7 @@ &lvds_bridge {
status = "okay";
};
-&panel0_lvds {
+&panel_lvds0 {
compatible = "edt,etml1010g3dra";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso
new file mode 100644
index 000000000000..418c8536e791
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+/dts-v1/;
+/plugin/;
+
+&backlight_lvds0 {
+ brightness-levels = <0 8 16 32 64 128 255>;
+ default-brightness-level = <8>;
+ enable-gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
+ num-interpolated-steps = <2>;
+ pwms = <&pwm1 0 66667 0>;
+ status = "okay";
+};
+
+&lcdif2 {
+ status = "okay";
+};
+
+&lvds_bridge {
+ assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
+ assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
+ /*
+ * The LVDS panel uses 66.5 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
+ * 66.5 * 7 = 465.5 MHz so the LDB serializer and LCDIFv3 scanout
+ * engine can reach accurate pixel clock of exactly 66.5 MHz.
+ */
+ assigned-clock-rates = <0>, <465500000>;
+ status = "okay";
+};
+
+&panel_lvds0 {
+ compatible = "powertip,ph128800t006-zhc01";
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
index 7a20284b0a29..4ffc950711d8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
@@ -15,7 +15,7 @@ / {
"phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";
model = "PHYTEC i.MX8MP Libra RDK FPSC";
- backlight_lvds0: backlight0 {
+ backlight_lvds0: backlight-lvds0 {
compatible = "pwm-backlight";
pinctrl-0 = <&pinctrl_lvds0>;
pinctrl-names = "default";
@@ -27,7 +27,7 @@ chosen {
stdout-path = &uart4;
};
- panel0_lvds: panel-lvds {
+ panel_lvds0: panel-lvds0 {
/* compatible panel in overlay */
backlight = <&backlight_lvds0>;
power-supply = <®_vdd_3v3>;
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 2/2] arm64: dts: imx8mp libra: add peb-av-10 expansion board overlay
2025-11-17 12:45 [PATCH v2 0/2] Add and Update display overlays for libra Yashwanth Varakala
2025-11-17 12:45 ` [PATCH v2 1/2] arm64: dts: imx8mp libra: add and update display overlays Yashwanth Varakala
@ 2025-11-17 12:45 ` Yashwanth Varakala
2025-12-29 3:52 ` [PATCH v2 0/2] Add and Update display overlays for libra Shawn Guo
2 siblings, 0 replies; 4+ messages in thread
From: Yashwanth Varakala @ 2025-11-17 12:45 UTC (permalink / raw)
To: shawnguo, s.hauer, kernel, festevam, robh, krzk+dt, conor+dt
Cc: imx, linux-arm-kernel, devicetree, linux-kernel, upstream,
peng.fan, y.varakala
Add an overlay of expansion board (PEB-AV-10) that supports multimedia
interfaces, 3.5mm headphone jack, a USB-A port and LVDS, backlight
connectors can be connected to the imx8mp libra. Audio works when no
display is connected to expansion board.
A separate overlay for Powertip display, based on peb-av-10.dtsi and
intended for use with PEB-AV-10 expansion board, will be added
later as display support is not yet available.
Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
---
Changes in v2:
- Change codec node name to audio-codec in peb-av-10.dtsi
arch/arm64/boot/dts/freescale/Makefile | 3 +
.../imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtsi | 196 ++++++++++++++++++
.../imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtso | 9 +
3 files changed, 208 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtso
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index eb38dcc76b84..0d2bd8d1d3b6 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -223,8 +223,11 @@ imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra-dtbs += imx8mp-libra-rdk-fpsc.dtb \
imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo
imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01-dtbs += imx8mp-libra-rdk-fpsc.dtb \
imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtbo
+imx8mp-libra-rdk-fpsc-lvds-peb-av-10-dtbs += imx8mp-libra-rdk-fpsc.dtb \
+ imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-enc-carrier-board.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtsi
new file mode 100644
index 000000000000..57bbbdd734e7
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtsi
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include "imx8mp-pinfunc.h"
+
+&{/} {
+
+ backlight_lvds1: backlight-lvds1 {
+ compatible = "pwm-backlight";
+ pinctrl-0 = <&pinctrl_lvds1>;
+ pinctrl-names = "default";
+ power-supply = <®_vcc_12v>;
+ status = "disabled";
+ };
+
+ panel_lvds1: panel-lvds1 {
+ backlight = <&backlight_lvds1>;
+ power-supply = <®_vdd_3v3>;
+ status = "disabled";
+
+ port {
+ panel1_in: endpoint {
+ remote-endpoint = <&ldb_lvds_ch1>;
+ };
+ };
+ };
+
+ reg_vcc_12v: regulator-12v {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <12000000>;
+ regulator-min-microvolt = <12000000>;
+ regulator-name = "VCC_12V";
+ };
+
+ reg_vcc_1v8_audio: regulator-1v8 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "VCC_1V8_Audio";
+ };
+
+ reg_vcc_3v3_analog: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "VCC_3V3_Analog";
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "snd-peb-av-10";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&dailink_master>;
+ simple-audio-card,frame-master = <&dailink_master>;
+ simple-audio-card,mclk-fs = <32>;
+ simple-audio-card,widgets =
+ "Line", "Line In",
+ "Speaker", "Speaker",
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing =
+ "Speaker", "SPOP",
+ "Speaker", "SPOM",
+ "Headphone Jack", "HPLOUT",
+ "Headphone Jack", "HPROUT",
+ "LINE1L", "Line In",
+ "LINE1R", "Line In",
+ "MIC3R", "Microphone Jack",
+ "Microphone Jack", "Mic Bias";
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+
+ dailink_master: simple-audio-card,cpu {
+ sound-dai = <&sai5>;
+ };
+ };
+};
+
+&i2c5 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&pinctrl_i2c5>;
+ pinctrl-1 = <&pinctrl_i2c5_gpio>;
+ pinctrl-names = "default", "gpio";
+ scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ codec: audio-codec@18 {
+ compatible = "ti,tlv320aic3007";
+ reg = <0x18>;
+ pinctrl-0 = <&pinctrl_tlv320>;
+ pinctrl-names = "default";
+ #sound-dai-cells = <0>;
+ ai3x-gpio-func = <0xd 0x0>;
+ ai3x-micbias-vg = <2>;
+ AVDD-supply = <®_vcc_3v3_analog>;
+ DRVDD-supply = <®_vcc_3v3_analog>;
+ DVDD-supply = <®_vcc_1v8_audio>;
+ IOVDD-supply = <®_vdd_3v3>;
+ };
+
+ eeprom@57 {
+ compatible = "atmel,24c32";
+ reg = <0x57>;
+ pagesize = <32>;
+ vcc-supply = <®_vdd_3v3>;
+ };
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel1_in>;
+};
+
+&pwm2 {
+ pinctrl-0 = <&pinctrl_pwm2>;
+ pinctrl-names = "default";
+};
+
+&sai5 {
+ pinctrl-0 = <&pinctrl_sai5>;
+ pinctrl-names = "default";
+ assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_IPG>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&clk IMX8MP_AUDIO_PLL1_OUT>,
+ <&clk IMX8MP_AUDIO_PLL2_OUT>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k",
+ "pll11k";
+ #sound-dai-cells = <0>;
+ fsl,sai-mclk-direction-output;
+ fsl,sai-synchronous-rx;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_i2c5: i2c5grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXD0__I2C5_SCL 0x400001c2
+ MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_i2c5_gpio: i2c5gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x1e2
+ MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x1e2
+ >;
+ };
+
+ pinctrl_lvds1: lvds1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x12
+ >;
+ };
+
+ pinctrl_pwm2: pwm2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO09__PWM2_OUT 0x12
+ >;
+ };
+
+ pinctrl_sai5: sai5grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI5_TX_DATA00 0xd6
+ MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI5_RX_DATA00 0xd6
+ MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI5_MCLK 0xd6
+ MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
+ MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
+ >;
+ };
+
+ pinctrl_tlv320: tlv320grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x16
+ >;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtso b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtso
new file mode 100644
index 000000000000..803a199dffa3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtso
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtsi"
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread